Transistor and method of fabricating the same

• US 9,105,726 B2
• Filed: 02/27/2014
• Issued: 08/11/2015
• Est. Priority Date: 06/14/2013
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Park, Sang-Hee, Hwang, Chi-Sun, Cho, Sung Haeng
• Primary Examiner(s): Wilson, Allan R
• Application Number:
  US14/192,239
• Publication Number:
  US 20140367689A1
• Time in Patent Office: 530 Days
• Field of Search: 257/66, 257/401
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/41758 for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular H01L29/41733 - H01L29/4175 take precedence
• CPC Class Codes: H01L 29/41775 characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Provided is a transistor. The transistor includes: a substrate; a semiconductor layer provided on the substrate and having one side vertical to the substrate and the other side facing the one side; a first electrode extending along the substrate and contacting the one side of the semiconductor layer; a second electrode extending along the substrate and contacting the other side of the semiconductor layer; a conductive wire disposed on the first electrode and spaced from the second electrode; a gate electrode provided on the semiconductor layer; and a gate insulating layer disposed between the semiconductor layer and the gate electrode, wherein the semiconductor layer, the first electrode, and the second electrode have a coplanar.

Claims

1. A transistor comprising:

a substrate;

a semiconductor layer provided on the substrate and having one side vertical to the substrate and the other side facing the one side;

a first electrode extending along the substrate and contacting the one side of the semiconductor layer;

a second electrode extending along the substrate and contacting the other side of the semiconductor layer;

a conductive wire disposed on the first electrode and spaced from the second electrode;

a gate electrode provided on the semiconductor layer;

a gate insulating layer disposed between the semiconductor layer and the gate electrode, and

an interlayer insulating layer provided directly on the semiconductor layer and covering the gate electrode, wherein the interlayer insulating layer is not vertically over the one side and the other side of the semiconductor layer,

wherein the semiconductor layer, the first electrode, and the second electrode have a coplanar level surface.

2. The transistor of claim 1, wherein a bottom surface of the semiconductor layer adjacent to the substrate has the same level as a lowermost surface of the first electrode adjacent to the substrate and a lowermost surface of the second electrode adjacent to the substrate.

3. The transistor of claim 1, wherein the first electrode is disposed at a position facing the second electrode and has a symmetric form to the second electrode.

4. The transistor of claim 1, wherein the first electrode comprises the same material as the second electrode.

5. The transistor of claim 1, wherein the semiconductor layer comprises a source region, a drain region, and a channel region,

wherein one of the source region and the drain region extends from the one side and the other one extends from the other side, and the channel region is disposed between the source region and the drain region.

6. The transistor of claim 1, further comprising a passivation layer covering the conductive wire, the first electrode, the second electrode, and the gate electrode.

7. The transistor of claim 1, wherein:

the first electrode has a first side near the interlayer insulating layer;

the conductive wire has a second side near the interlayer insulating layer; and

the first side and the second side are coplanar.

8. The transistor of claim 1, wherein:

the first electrode includes transparent conductive oxides;

the second electrode includes transparent conductive oxides; and

the conductive wire includes at least one of Al and Cu.

9. A transistor comprising:

a substrate;

a semiconductor layer provided on the substrate and having one side vertical to the substrate and the other side facing the one side;

a first electrode extending along the substrate and contacting the one side of the semiconductor layer;

a second electrode extending along the substrate and contacting the other side of the semiconductor layer;

a conductive wire disposed on the first electrode and spaced from the second electrode;

a gate electrode provided on the semiconductor layer;

a gate insulating layer disposed between the semiconductor layer and the gate electrode, and

an interlayer insulating layer provided on the semiconductor layer and covering the gate electrode,

wherein the semiconductor layer, the first electrode, and the second electrode have a coplanar level surface, and

wherein the first electrode is disposed closer to the interlayer insulating layer than the conductive wire is disposed to the interlayer insulating layer.

10. The transistor of claim 9, wherein the conductive wire does not contact with the interlayer insulating layer.

11. The transistor of claim 9, wherein the first electrode and the second electrode contact with the interlayer insulating layer.

12. The transistor of claim 9, wherein the first electrode and the second electrode do not vertically overlap the gate electrode.

13. The transistor of claim 9, wherein:

the first electrode includes transparent conductive oxides;

the second electrode includes transparent conductive oxides; and

the conductive wire includes at least one of Al and Cu.