Semiconductor device and manufacturing method thereof

• US 9,105,749 B2
• Filed: 05/08/2012
• Issued: 08/11/2015
• Est. Priority Date: 05/13/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sasagawa, Shinya, Ishizuka, Akihiro, Hatano, Takehisa
• Primary Examiner(s): CARPENTER, ROBERT K
• Application Number:
  US13/466,583
• Publication Number:
  US 20120286261A1
• Time in Patent Office: 1,190 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H01L 21/8252 the substrate being a semiconductor, using III-V technology H01L21/8258 takes precedence
• CPC Class Codes: H01L 21/8256 the substrate being a semiconductor, using technologies not covered by one of groups H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252 and H01L21/8254 H01L21/8258 takes precedence
• CPC Class Codes: H01L 27/0605 integrated circuits made of compound material, e.g. AIIIBV
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

In a transistor including a wide band gap semiconductor layer as a semiconductor layer, a wide band gap semiconductor layer is separated into an island shape by an insulating layer with passivation properties for preventing atmospheric components from permeating. The edge portion of the island shape wide band gap semiconductor layer is in contact with the insulating film; thus, moisture or atmospheric components can be prevented from entering from the edge portion of the semiconductor layer to the wide band gap semiconductor layer.

Claims

1. A semiconductor device comprising:

a first insulating layer including a projection and a trench;

a semiconductor layer over the first insulating layer, the semiconductor layer including a semiconductor whose band gap is wider than a band gap of silicon;

a second insulating layer in contact with a side surface of the semiconductor layer, a lower part of the second insulating layer embedded into the trench of the first insulating layer;

a third insulating layer over the semiconductor layer;

a gate electrode over the third insulating layer; and

a source electrode and a drain electrode which are electrically connected to the semiconductor layer, wherein the projection is interposed between the source electrode and the drain electrode,

wherein a part of the semiconductor layer is interposed between a side surface of the projection and the gate electrode.

2. The semiconductor device according to claim 1, wherein a whole side surface of the semiconductor layer is in contact with the second insulating layer.

3. The semiconductor device according to claim 1, wherein a top surface of the semiconductor layer is located lower than a top surface of the second insulating layer and higher than a top surface of the projection.

4. The semiconductor device according to claim 1, wherein the semiconductor is an oxide semiconductor.

5. The semiconductor device according to claim 1,

wherein the second insulating layer extends along an edge of the semiconductor layer.

6. The semiconductor device according to claim 1, wherein the second insulating layer includes any one of aluminum oxide, aluminum oxynitride, aluminum nitride, silicon nitride, gallium oxide, and gallium nitride.

7. The semiconductor device according to claim 1, wherein the semiconductor is an In—

Ga—

Zn-based oxide.

8. The semiconductor device according to claim 1, wherein the trench of the first insulating layer surrounds the semiconductor layer.

9. A semiconductor device comprising:

a first insulating layer including a projection and a trench;

a semiconductor layer over and in contact with the first insulating layer, the semiconductor layer including a semiconductor whose band gap is wider than a band gap of silicon, wherein the semiconductor layer has an island shape;

a second insulating layer in contact with a side surface of the semiconductor layer, a lower part of the second insulating layer embedded into the trench of the first insulating layer;

a gate insulating layer over and in contact with the semiconductor layer and the second insulating layer;

a gate electrode over and in contact with the gate insulating layer; and

a source electrode and a drain electrode which are electrically connected to the semiconductor layer, wherein the projection is interposed between the source electrode and the drain electrode,

wherein a part of the semiconductor layer is interposed between a side surface of the projection and the gate electrode, and

wherein a top surface of the semiconductor layer is located lower than a top surface of the second insulating layer.

10. The semiconductor device according to claim 9, wherein the second insulating layer has a passivation property.

11. The semiconductor device according to claim 9, wherein the second insulating layer includes any one of aluminum oxide, aluminum oxynitride, aluminum nitride, silicon nitride, gallium oxide, and gallium nitride.

12. The semiconductor device according to claim 9, wherein the semiconductor is an oxide semiconductor.

13. The semiconductor device according to claim 9, wherein the semiconductor is an In—

Ga—

Zn-based oxide.

14. The semiconductor device according to claim 9, wherein a whole side surface of the semiconductor layer is in contact with the second insulating layer.

15. The semiconductor device according to claim 9, wherein the second insulating layer extends along an edge of the semiconductor layer.

16. The semiconductor device according to claim 9, wherein the trench of the first insulating layer surrounds the semiconductor layer.