Display device and manufacturing method thereof

• US 9,112,043 B2
• Filed: 01/09/2014
• Issued: 08/18/2015
• Est. Priority Date: 12/25/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Arai, Yasuyuki
• Primary Examiner(s): POTTER, ROY KARL
• Application Number:
  US14/151,183
• Publication Number:
  US 20140124779A1
• Time in Patent Office: 586 Days
• Field of Search: 257/43
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02581 Transition metal or rare earth elements
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.

Claims

1. A semiconductor device comprising:

a first oxide semiconductor layer;

a second oxide semiconductor layer in contact with top and side surfaces of the first oxide semiconductor layer;

an electrode in contact with the second oxide semiconductor layer;

a gate electrode overlaps with the electrode;

a gate insulating film between the gate electrode and the second oxide semiconductor layer; and

an insulating film in contact with the second oxide semiconductor layer and the electrode,

wherein at least a part of the second oxide semiconductor layer is in contact with the gate insulating film, and

wherein the part of the second oxide semiconductor layer is provided between the gate electrode and the electrode.

2. The semiconductor device according to claim 1, wherein a composition ratio of the first oxide semiconductor layer is different from a composition ratio of the second oxide semiconductor layer.

3. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer includes a crystalline structure.

4. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer comprises indium and zinc.

5. The semiconductor device according to claim 1, further comprising a capacitor comprising the second oxide semiconductor layer.

6. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer has a tapered side surface.

7. An electronic apparatus comprising the semiconductor device according to claim 1 and at least one selected from the group consisting of a speaker, an operation key, and an antenna.

8. A semiconductor device comprising:

a first oxide semiconductor layer;

a second oxide semiconductor layer in contact with top and side surfaces of the first oxide semiconductor layer;

an electrode in contact with the second oxide semiconductor layer;

a gate electrode overlaps with the electrode;

a gate insulating film between the gate electrode and the second oxide semiconductor layer; and

an insulating film in contact with the second oxide semiconductor layer and the electrode,

wherein the electrode is provided over the first oxide semiconductor layer,

wherein at least a part of the second oxide semiconductor layer is in contact with the gate insulating film, and

wherein the part of the second oxide semiconductor layer is provided between the gate electrode and the electrode.

9. The semiconductor device according to claim 8, wherein a composition ratio of the first oxide semiconductor layer is different from a composition ratio of the second oxide semiconductor layer.

10. The semiconductor device according to claim 8, wherein the first oxide semiconductor layer includes a crystalline structure.

11. The semiconductor device according to claim 8, wherein the first oxide semiconductor layer comprises indium and zinc.

12. The semiconductor device according to claim 8, further comprising a capacitor comprising the second oxide semiconductor layer.

13. The semiconductor device according to claim 8, wherein the first oxide semiconductor layer has a tapered side surface.

14. An electronic apparatus comprising the semiconductor device according to claim 8 and at least one selected from the group consisting of a speaker, an operation key, and an antenna.