High-efficiency power supply for a modulated load

• US 9,112,452 B1
• Filed: 07/14/2010
• Issued: 08/18/2015
• Est. Priority Date: 07/14/2009
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: RF Micro Devices Incorporated (Qorvo, Inc.)
• Inventors: Khlat, Nadim
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US12/836,307
• Time in Patent Office: 1,861 Days
• Field of Search: 330/127, 330/297, 330/10, 330/302
• US Class Current: 1/1
• CPC Class Codes: H03F 1/0227 using supply converters
• CPC Class Codes: H03F 3/04 with semiconductor devices only
• CPC Class Codes: H03G 3/00 Gain control in amplifiers or frequency changers

Abstract

The present disclosure relates to power supply circuitry that has wide bandwidth and achieves high efficiency by using at least one energy storage element for efficient power transfer between two power supply circuits and to an amplitude modulated load. Specifically, the power supply circuitry may include a first power supply circuit, which may be a switching power supply circuit, a second power supply circuit, which may be a linear power supply circuit and may include the energy storage element, and control circuitry to facilitate efficient power transfer. The control circuitry may select one of multiple operating modes, which may include a first operating mode, during which the first power supply circuit may provide power to the energy storage element, and a second operating mode, during which the second power supply circuit may provide power to the amplitude modulated load from the energy storage element.

Claims

1. Power supply circuitry comprising:

a first power supply circuit configured to, during a first operating mode, provide power to an amplitude modulated load via a first output signal and provide power to at least a first energy storage element via the first output signal, wherein the first energy storage element is coupled to ground;

a second power supply circuit comprising the at least the first energy storage element and a transistor element, and configured to, during a second operating mode, provide power to the amplitude modulated load using a second output signal from the first energy storage element via the transistor element; and

control circuitry adapted to select one of a plurality of operating modes, such that the plurality of operating modes comprises the first operating mode and the second operating mode.

2. The power supply circuitry of claim 1 wherein the second power supply circuit is further adapted to:

during the first operating mode, prevent power from being provided from the at least the first energy storage element to the amplitude modulated load; and

during the second operating mode, prevent power from being provided to the first energy storage element from the first power supply circuit.

3. The power supply circuitry of claim 1 wherein the first power supply circuit comprises a switching power supply circuit, which is adapted to regulate the first output signal based on a power supply control input signal (PSCIS), and the second power supply circuit comprises a linear power supply circuit, which is adapted to regulate the second output signal based on the PSCIS.

4. The power supply circuitry of claim 3 wherein an output bandwidth of the linear power supply circuit is wider than an output bandwidth of the switching power supply circuit, and a modulation bandwidth of the amplitude modulated load is wider than the output bandwidth of the switching power supply circuit.

5. The power supply circuitry of claim 3 wherein the power to the amplitude modulated load via the second output signal from the at least the first energy storage element compensates for the output bandwidth of the switching power supply circuit.

6. The power supply circuitry of claim 3 wherein the amplitude modulated load comprises at least one power amplifier stage adapted to receive and amplify an amplitude modulated radio frequency (RF) input signal to provide an amplitude modulated RF output signal.

7. The power supply circuitry of claim 6 wherein the PSCIS is based on amplitude modulation (AM) of the amplitude modulated RF input signal.

8. The power supply circuitry of claim 3 wherein the switching power supply circuit comprises a buck switching power supply, which is adapted to receive first power from a direct current (DC) power supply and provide the first output signal based on the first power from the DC power supply.

9. The power supply circuitry of claim 8 wherein the switching power supply circuit further comprises a multi-level charge-pump coupled adapted to receive second power from the DC power supply and provide the first power from the DC power supply to the buck switching power supply, such that the first power from the DC power supply is via the multi-level charge-pump.

10. The power supply circuitry of claim 3 wherein the DC power supply is provided by a battery.

11. The power supply circuitry of claim 3 wherein the at least the first energy storage element comprises at least a first capacitive element.

12. The power supply circuitry of claim 3 wherein:

the switching power supply circuit comprises a first output adapted to provide the first output signal;

the linear power supply circuit comprises a second output adapted to provide the second output signal;

the first output and the second output are coupled together;

the first output signal has a first current and the second output signal has a second current;

the linear power supply circuit is adapted to provide a first power supply control signal to the switching power supply circuit;

the linear power supply circuit regulates the second output signal using the PSCIS;

the linear power supply circuit regulates the first power supply control signal to approximately minimize the second current; and

the switching power supply signal regulates the first output signal using the first power supply control signal.

13. The power supply circuitry of claim 12 wherein the plurality of operating modes further comprises a third operating mode, such that during the third operating mode, the at least the first energy storage element neither provides nor receives power.

14. The power supply circuitry of claim 13 wherein the linear power supply circuit comprises:

a first high side linear transistor element adapted to receive power from a direct current (DC) power supply, such that an inverting output of the first high side linear transistor element is coupled to the second output;

a second high side linear transistor element having a non-inverting output coupled to the at least the first energy storage element and having an inverting output coupled to the second output;

a first low side linear transistor element having a non-inverting output coupled to ground and having an inverting output coupled to the second output; and

a second low side linear transistor element having a non-inverting output coupled to the at least the first energy storage element and having an inverting output coupled to the second output.

15. The power supply circuitry of claim 14 wherein:

during the first operating mode, the first high side linear transistor element is available to provide amplification, the second high side linear transistor element is biased off, the first low side linear transistor element is biased off, and the second low side linear transistor element is available to provide amplification;

during the second operating mode, the first high side linear transistor element is biased off, the second high side linear transistor element is available to provide amplification, the first low side linear transistor element is available to provide amplification, and the second low side linear transistor element is biased off; and

during the third operating mode, the first high side linear transistor element is available to provide amplification, the second high side linear transistor element is biased off, the first low side linear transistor element is available to provide amplification, and the second low side linear transistor element is biased off.

16. The power supply circuitry of claim 13 wherein the linear power supply circuit comprises:

a first high side linear transistor element adapted to receive power from a direct current (DC) power supply;

a second high side linear transistor element having a non-inverting output coupled to the at least the first energy storage element and having an inverting output coupled to an inverting output of the first high side linear transistor element;

a first low side linear transistor element having a non-inverting output coupled to ground and having an inverting output coupled to the inverting output of the second high side linear transistor element;

a second low side linear transistor element having a non-inverting output coupled to the at least the first energy storage element and having an inverting output coupled to the inverting output of the first low side linear transistor element; and

an offset capacitive element coupled between the inverting output of the second low side linear transistor element and the second output.

17. The power supply circuitry of claim 16 wherein:

during the first operating mode, the first high side linear transistor element is available to provide amplification, the second high side linear transistor element is biased off, the first low side linear transistor element is biased off, and the second low side linear transistor element is available to provide amplification;

during the second operating mode, the first high side linear transistor element is biased off, the second high side linear transistor element is available to provide amplification, the first low side linear transistor element is available to provide amplification, and the second low side linear transistor element is biased off; and

during the third operating mode, the first high side linear transistor element is available to provide amplification, the second high side linear transistor element is biased off, the first low side linear transistor element is available to provide amplification, and the second low side linear transistor element is biased off.

18. The power supply circuitry of claim 13 wherein the linear power supply circuit comprises:

a first high side linear transistor element adapted to receive power from a direct current (DC) power supply;

a second high side linear transistor element having a non-inverting output coupled to the at least the first energy storage element and having an inverting output coupled to an inverting output of the first high side linear transistor element;

a first low side linear transistor element having a non-inverting output coupled to ground and having an inverting output coupled to the inverting output of the second high side linear transistor element;

a second low side linear transistor element having a non-inverting output coupled to the at least the first energy storage element and having an inverting output coupled to the second output; and

an offset capacitive element coupled between the inverting output of the first low side linear transistor element and the second output.

19. The power supply circuitry of claim 18 wherein:

during the first operating mode, the first high side linear transistor element is available to provide amplification, the second high side linear transistor element is biased off, the first low side linear transistor element is biased off, and the second low side linear transistor element is available to provide amplification;

during the second operating mode, the first high side linear transistor element is biased off, the second high side linear transistor element is available to provide amplification, the first low side linear transistor element is available to provide amplification, and the second low side linear transistor element is biased off; and

during the third operating mode, the first high side linear transistor element is available to provide amplification, the second high side linear transistor element is biased off, the first low side linear transistor element is available to provide amplification, and the second low side linear transistor element is biased off.

20. The power supply circuitry of claim 13 wherein the linear power supply circuit comprises:

a first high side switching element adapted to receive power from a direct current (DC) power supply into a first switching terminal of the first high side switching element;

a second high side switching element having a first switching terminal coupled to the at least the first energy storage element;

a first high side linear transistor element having an inverting output coupled to the second output and having a non-inverting output coupled to a second switching terminal of the first high side switching element and coupled to a second switching terminal of the second high side switching element;

a first low side switching element having a first switching terminal coupled to ground;

a second low side switching element having a first switching terminal coupled to the at least the first energy storage element; and

a first low side linear transistor element having an inverting output coupled to the second output and having a non-inverting output coupled to a second switching terminal of the first low side switching element and coupled to a second switching terminal of the second low side switching element.

21. The power supply circuitry of claim 20 wherein:

during the first operating mode, the first high side switching element is in a CLOSED state, the second high side switching element is in an OPEN state, the first low side switching element is in an OPEN state, and the second low side switching element is in a CLOSED state;

during the second operating mode, the first high side switching element is in an OPEN state, the second high side switching element is in a CLOSED state, the first low side switching element is in a CLOSED state, and the second low side switching element is in an OPEN state; and

during the third operating mode, the first high side switching element is in a CLOSED state, the second high side switching element is in an OPEN state, the first low side switching element is in a CLOSED state, and the second low side switching element is in an OPEN state.

22. The power supply circuitry of claim 12 further comprising a bypass capacitive element having a bypass current and coupled between the second output and ground wherein:

the linear power supply circuit further comprises an output impedance compensation circuit adapted to receive the PSCIS and provide a compensated PSCIS based on the PSCIS;

the linear power supply circuit regulates the second output signal using the PSCIS via the output impedance compensation circuit;

the linear power supply circuit further regulates the second output signal using the compensated PSCIS;

the output impedance compensation circuit provides an estimated bypass current based on an estimate of the bypass current and provides a sensed second current based on sensing the second current; and

the compensated PSCIS is based on the estimated bypass current and the sensed second current.

23. The power supply circuitry of claim 22 wherein the compensated PSCIS is based on a derivative with respect to time of a difference between the estimated bypass current and the sensed second current.

24. A method comprising:

providing a first power supply circuit, a second power supply circuit, a transistor element, and at least a first energy storage element, which is coupled to ground;

selecting one of a plurality of operating modes, such that the plurality of operating modes comprises a first operating mode and a second operating mode;

during the first operating mode, providing power to an amplitude modulated load via a first output signal;

during the first operating mode, providing power to the at least the first energy storage element in the second power supply circuit via the first output signal; and

during the second operating mode, providing power to the amplitude modulated load using a second output signal from the first energy storage element via the transistor element.