Conformal films on semiconductor substrates

• US 9,117,884 B1
• Filed: 09/14/2012
• Issued: 08/25/2015
• Est. Priority Date: 04/11/2003
• Status: Active Grant

• Current Assignee: Novellus Systems Incorporated (Lam Research Corporation)
• Original Assignee: Novellus Systems Incorporated (Lam Research Corporation)
• Inventors: Shaviv, Roey, Gopinath, Sanjay, Holverson, Peter, Pradhan, Anshu A.
• Primary Examiner(s): Smoot, Stephen W
• Application Number:
  US13/619,077
• Time in Patent Office: 1,075 Days
• US Class Current: 1/1
• CPC Class Codes: C23C 14/025 Metallic sublayers
• CPC Class Codes: C23C 14/046 Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/68714 the wafers being placed on a susceptor, stage or support
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76865 Selective removal of parts of the layer H01L21/76844 takes precedence
• CPC Class Codes: H01L 21/76873 for electroplating

Abstract

A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.

Claims

1. An apparatus for depositing a layer of diffusion barrier or seed material on a semiconductor substrate, the apparatus comprising:

(a) a physical vapor deposition (PVD) process chamber having a target for sputtering a material onto the semiconductor substrate;

(b) a semiconductor substrate support in the PVD process chamber for holding the semiconductor substrate in position during deposition of the material; and

(c) a controller comprising program instructions for;

(i) performing a first net deposition cycle including

depositing a first deposited layer of the diffusion barrier or seed material and

etching the first deposited layer to form a first etched layer having a first net deposited thickness; and

(ii) performing a second net deposition cycle including

depositing a second deposited layer of the diffusion barrier or seed material over the first etched layer and

etching the second deposited layer to form a second etched layer over the first etched layer, the second etched layer having a second net deposited thickness, wherein the first net deposited thickness is greater than the second net deposited thickness and wherein no etching bias is applied to the semiconductor substrate during etching of the first deposited layer and wherein an etching bias is applied during etching of the second deposited layer.

2. The apparatus of claim 1, wherein the thickness of the first deposited layer is between about 2 and 100 Angstroms and the thickness of the second deposited layer is between about 2 and 50 Angstroms.

3. The apparatus of claim 1, wherein the controller comprises program instructions for performing between about 2 and 20 net deposition cycles.

4. The apparatus of claim 1, wherein the program instructions further comprise instructions for performing a third net deposition cycle including depositing a third deposited layer of the diffusion barrier or seed material, wherein the thickness of the third deposited layer is different than the thickness of the first deposited layer and different than the thickness of the second deposited layer.

5. The apparatus of claim 1, wherein a thickness difference between the first etched layer and the first deposited layer is approximately the same as a thickness difference between the second etched layer and the second deposited layer.

6. The apparatus of claim 1, wherein a thickness difference between the first etched layer and the first deposited layer is less than a thickness difference between the second etched layer and the second deposited layer.

7. The apparatus of claim 1, wherein the first deposited layer is thicker than the second deposited layer.

8. The apparatus of claim 1, wherein the program instructions comprise instructions for etching during the first net deposition cycle at a first etch rate to deposition rate (E/D) ratio and etching during the second net deposition cycle at a second etching E/D ratio, wherein the first etching E/D ratio is different than the second etching E/D ratio.

9. The apparatus of claim 1, wherein the PVD process chamber is configured for performing both the first net deposition cycle and the second net deposition cycle.

10. The apparatus of claim 1, wherein the apparatus comprises a hollow cathode magnetron.

11. The apparatus of claim 1, wherein the apparatus comprises a planar magnetron.

12. The apparatus of claim 1, wherein the diffusion barrier or seed material comprises a material selected from the group consisting of Ta, TaN_x, Ti, TiN_x, W, WN_x, Ru, Mn, and Co.

13. The apparatus of claim 1, wherein the diffusion barrier or seed material comprises a material selected from the group consisting of copper, manganese, aluminum, and alloys of those metals.

14. An apparatus for depositing a layer of diffusion barrier or seed material on a semiconductor substrate, the apparatus comprising:

(a) a physical vapor deposition (PVD) process chamber having a target for sputtering a material onto the semiconductor substrate;

(b) a semiconductor substrate support in the PVD process chamber for holding the semiconductor substrate in position during deposition of the material; and

(c) a controller comprising program instructions for;

performing a first net deposition cycle including

depositing a first deposited layer of the diffusion barrier or seed material and

etching the first deposited layer to form a first etched layer having a first net deposited thickness; and

performing a second net deposition cycle including

depositing a second deposited layer of the diffusion barrier or seed material over the first etched layer and

etching the second deposited layer to form a second etched layer over the first etched layer, the second etched layer having a second net deposited thickness, wherein the first net deposited thickness is greater than the second net deposited thickness and wherein the diffusion barrier or seed material comprises a material selected from the group consisting of copper, manganese, aluminum, and alloys of those metals.

15. The apparatus of claim 14, wherein the program instructions comprise instructions for forming the first deposited layer at a thickness of between about 2 and 100 Angstroms and for forming the second deposited layer at a thickness of between about 2 and 50 Angstroms.

16. The apparatus of claim 14, wherein the controller further comprises program instructions for performing a third net deposition cycle including depositing a third deposited layer of the diffusion barrier or seed material, wherein the thickness of the third deposited layer is different than the thickness of the first deposited layer and different than the thickness of the second deposited layer.

17. The apparatus of claim 14, wherein the program instructions specify that the first deposited layer is thicker than the second deposited layer.

18. The apparatus of claim 14, wherein the program instructions comprise instructions for applying a first etching bias to the semiconductor substrate during etching of the first deposited layer and for applying a second etching bias during etching of the second deposited layer, wherein the first etching bias is less than the second etching bias.

19. The apparatus of claim 14, wherein the apparatus is configured for performing the first net deposition cycle and the second net deposition cycle in the PVD process chamber.

20. The apparatus of claim 14, wherein the apparatus comprises a hollow cathode magnetron.