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Adaptive reference tuning for endurance enhancement of non-volatile memories

  • US 9,122,404 B2
  • Filed: 03/15/2013
  • Issued: 09/01/2015
  • Est. Priority Date: 03/15/2013
  • Status: Expired due to Fees
First Claim
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1. A memory device comprising:

  • a plurality of memory cells;

    a sensing circuit for determining a state of a selected memory cell among said plurality of memory cells, said state determining including measuring a physical quantity employed in detecting a bit value of the selected memory cell, said memory cell subject to plural write cycles applied to that memory cell; and

    a memory controller comprising at least a control logic block and a look-up table, the look-up table for encoding a relationship between a value of a variable reference parameter value associated with measuring said physical quantity at said cell and a number of subjected said write cycles to said plurality of memory cells, and wherein said control logic block counts said plural write cycles to memory cell locations and determines an estimated number of cycling for said plurality of memory cells by counting a total number of cycling for at least one memory cell,wherein for said cell memory state determining, said look-up table returns a value for said variable reference parameter to said sensing circuit for each value of said total number of cycling provided by said control logic block, andsaid sensing circuit comparing a value of a measured quantity from said selected memory cell with the variable reference parameter in the determining of the cell state.

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