×

Method for manufacturing semiconductor device

  • US 9,123,751 B2
  • Filed: 05/27/2014
  • Issued: 09/01/2015
  • Est. Priority Date: 10/24/2008
  • Status: Active Grant
First Claim
Patent Images

1. A method for manufacturing a semiconductor device, comprising:

  • forming a gate electrode layer over a substrate having an insulating surface;

    stacking a gate insulating layer, an oxide semiconductor film, and a conductive film over the gate electrode layer;

    forming a first mask layer over the gate insulating layer, the oxide semiconductor film, and the conductive film;

    performing a first etching with the first mask layer to etch the oxide semiconductor film and the conductive film so that an oxide semiconductor layer and a conductive layer are formed;

    forming a second mask layer by ashing the first mask layer; and

    performing a second etching with the second mask layer to etch the oxide semiconductor layer and the conductive layer so that an oxide semiconductor layer having a depression, a source electrode layer, and a drain electrode layer are formed,wherein the first mask layer is formed using a light-exposure mask,wherein the first etching is dry etching with use of an etching gas,wherein the second etching is wet etching with use of an etchant,wherein the oxide semiconductor layer having the depression includes a region with a smaller thickness than a region overlapping with the source electrode layer or the drain electrode layer,wherein each of the source electrode layer and the drain electrode layer including an inner edge opposed to each other,wherein the oxide semiconductor layer having the depression comprises a first region overlapping with the inner edge of the source electrode layer, a second region overlapping with the inner edge of the drain electrode layer, and a third region between the first region and the second region,wherein the third region comprises a slanted surface adjacent to one of the inner edges of the source electrode layer and the drain electrode layer, andwherein a taper angle of the slanted surface is smaller than one of taper angles of the inner edges of the source electrode layer and the drain electrode layer.

View all claims
  • 0 Assignments
Timeline View
Assignment View
    ×
    ×