Current saturation detection and clamping circuit and method
First Claim
1. A current saturation detection and clamping circuit, comprising:
- a switch having a control terminal and first and second conduction terminals;
a first amplifier having first and second inputs and first and second outputs, the first input coupled to the second conduction terminal of the switch and the first output coupled to the control terminal of the switch;
a first impedance coupled between the second input of the first amplifier and the first conduction terminal of the switch; and
a ground fault circuit interrupter engine having first and second inputs, the first input coupled to the first conduction terminal of the switch and the second input coupled to the second conduction terminal of the switch.
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Accused Products
Abstract
A method and circuit for detecting and clamping current in a ground fault circuit interrupter circuit. In accordance with an embodiment the circuit includes an amplifier connected to a switch, where in the amplifier has an input connected to a first conduction terminal of the switch through a resistor and another input connected to a second conduction terminal of the switch. An output of the amplifier is connected to a control terminal of the switch. The circuit may include a ground fault circuit interrupter engine having an input connected to the first conduction terminal of the switch and another second input connected to the second conduction terminal of the switch.
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Citations
19 Claims
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1. A current saturation detection and clamping circuit, comprising:
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a switch having a control terminal and first and second conduction terminals; a first amplifier having first and second inputs and first and second outputs, the first input coupled to the second conduction terminal of the switch and the first output coupled to the control terminal of the switch; a first impedance coupled between the second input of the first amplifier and the first conduction terminal of the switch; and a ground fault circuit interrupter engine having first and second inputs, the first input coupled to the first conduction terminal of the switch and the second input coupled to the second conduction terminal of the switch. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A circuit, comprising:
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a transistor having a control electrode and first and second current carrying electrodes; a ground fault circuit interrupter engine having a plurality of inputs, a first input of the plurality of inputs coupled to the first current carrying electrode of the transistor and a second input of the plurality of inputs coupled to the second current carrying electrode of the transistor; and a drive circuit having a plurality of inputs and an output, the output coupled to the control electrode of the transistor, wherein the drive circuit comprises; a first gain stage having first and second inputs and first and second outputs, the first input coupled to the second current carrying electrode of the transistor and serving as a first input of the plurality of inputs; and a second gain stage having first and second inputs and first and second outputs, the first input coupled to the second current carrying electrode of the transistor and serving as a second input of the plurality of inputs and the output coupled to the control electrode of the transistor, the outputs of the first and second gain stages coupled together to form the output of the drive circuit. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A method for detecting a fault condition, comprising:
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detecting a differential current level of a current flowing in a power mains; activating a current shunt in response to the differential current level generating a voltage at a node that one of exceeds a first reference voltage or is less than a second reference voltage; clamping the voltage at the node at the first reference voltage in response to the voltage at the node exceeding the first reference voltage or clamping the voltage at the node at the second reference voltage in response to the voltage at the node being less than the second reference voltage; generating a saturation signal in response to clamping the voltage at the node; and generating a fault detection signal in response to the saturation signal being asserted for a predetermined time. - View Dependent Claims (17, 18, 19)
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Specification