Battery cell impedance measurement method and apparatus

• US 9,128,165 B2
• Filed: 05/04/2011
• Issued: 09/08/2015
• Est. Priority Date: 05/04/2011
• Status: Active Grant

• Current Assignee: Datang NXP Semiconductors Company Limited (Datang Telecom Technology Company Limited)
• Original Assignee: Datang NXP Semiconductors Company Limited (Datang Telecom Technology Company Limited)
• Inventors: Lammers, Matheus Johannes Gerardus
• Primary Examiner(s): Rodas, Richard Isla
• Assistant Examiner(s): DIBENEDETTO, MICHAEL N
• Application Number:
  US13/100,652
• Publication Number:
  US 20120280693A1
• Time in Patent Office: 1,588 Days
• Field of Search: 324/430, 324/525, 324/600
• US Class Current: 1/1
• CPC Class Codes: G01R 31/389 Measuring internal impedance, internal conductance or related variables
• CPC Class Codes: H01M 10/44 Methods for charging or discharging circuits for charging H02J7/00
• CPC Class Codes: H01M 10/48 Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569
• CPC Class Codes: H01M 10/482 for several batteries or cells simultaneously or sequentially
• CPC Class Codes: H01M 2010/4271 Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
• CPC Class Codes: H02J 7/0019 using switched or multiplexed charge circuits
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y02T 10/70 Energy storage systems for electromobility, e.g. batteries

Abstract

A circuit arrangement for determining impedance of a battery cell is provided. A first circuit is configured to generate sine and cosine waveforms having N sample values per period. A second circuit is coupled to an output of the first circuit and is configured to input a current into the cell in response to the sample values of the cosine waveform. The current has an amplitude proportional to the sample values of the cosine waveform. A third circuit is coupled to the cell and configured to sample voltage levels across the cell resulting from the current being input into the cell. A fourth circuit is coupled to an output of the third circuit and is configured to separate each voltage level sampled by the third circuit into real and imaginary components.

Claims

1. A circuit arrangement for determining impedance of a battery cell, the circuit comprising:

a first circuit configured to generate sample values representative of a sine waveform and a cosine waveform at a target frequency and sample rate, with each period of the sine waveform including N sample values and each period of the cosine waveform including N sample values;

a second circuit coupled to an output of the first circuit and configured to input a current into the cell in response to the sample values of the cosine waveform, the current having an amplitude proportional to the sample values of the cosine waveform;

a third circuit coupled to the cell and configured to sample voltage levels across the cell resulting from the current being input into the cell, the third circuit is configured to sample voltage levels at a sample rate equal to a sample rate of the cosine waveform; and

a fourth circuit coupled to an output of the third circuit and configured to separate each voltage level sampled by the third circuit into real and imaginary components.

2. The circuit arrangement of claim 1, wherein the fourth circuit is configured to separate each sampled voltage level into real and imaginary components by:

multiplying each voltage level sampled by the third circuit with a sine waveform to generate the imaginary component; and

multiplying each voltage level sampled by the third circuit with a cosine waveform to generate the real component.

3. The circuit arrangement of claim 2, wherein the fourth circuit is configured to separate each sampled voltage level into real and imaginary components by:

multiplying each voltage level sampled by the third circuit with the sine waveform generated by the first circuit scaled by a calibration scalar to generate the imaginary component; and

multiplying each voltage level sampled by the third circuit with the cosine waveform of the first circuit scaled by a calibration scalar to generate the real component.

4. The circuit arrangement of claim 2, wherein the fourth circuit is further configured to:

sum the real components of N of the voltage levels sampled by the third circuit to determine a real component of the impedance of the battery cell; and

sum the imaginary components of the N of the voltage levels sampled to determine an imaginary component of the impedance of the battery cell.

5. The circuit arrangement of claim 4, wherein the fourth circuit includes:

a fifth circuit coupled and configured to receive and accumulate the generated real component of the voltage levels sampled by the third circuit; and

a sixth circuit coupled and configured to receive and accumulate the generated imaginary component of the voltage levels sampled by the third circuit.

6. The circuit arrangement of claim 1, wherein the second circuit is configured and arranged to input the current into the cell by generating a current pulse having a density proportional to at least one of the sampled values.

7. The circuit arrangement of claim 1, wherein the third circuit is further configured to convert sampled voltage levels from analog to digital values.

8. The circuit arrangement of claim 1, wherein the second circuit, includes:

a cell balancing circuit configured to balance energy stored in a plurality of cells including the battery cell; and

a pulse density modulation circuit configured to drive transistor gates of the cell balancing circuit.

9. The circuit arrangement of claim 4, wherein the fourth circuit determines a frequency domain equivalent value of the voltage levels sampled by the third circuit for a frequency band corresponding to the frequency of the cosine waveform.

10. The circuit arrangement of claim 1, wherein the first circuit is a polynomial waveform generator configured to:

calculate the sine waveform using M polynomial coefficients; and

calculate the cosine waveform using M−

1 of the M polynomial coefficients.

11. The circuit arrangement of claim 10, wherein the first circuit is an M-stage cascade accumulator, the output of the stage M producing the sine waveform, and the output of the stage M−

1 producing the cosine waveform.

12. A method for determining impedance of a battery cell, the method comprising:

generating sine and cosine waveforms at a target frequency and sample rate, each period of each of the waveforms having N sample points;

for each sample point of the cosine waveform;

injecting a current having an amplitude corresponding to a value of the sample point into a battery cell;

converting a voltage level across the cell from an analog to a digital value at a sample rate equal to the sample rate of the cosine waveform; and

separating the digital value of the voltage into real and imaginary components;

summing the real component of N digital values to determine a real component of the impedance of the battery cell; and

summing the imaginary component of the N digital values to determine an imaginary component of the impedance of the battery cell.

13. The method of claim 12, wherein the digital value of the voltage is separated into real and imaginary components by:

multiplying the digital value with the sine waveform to generate the imaginary component; and

multiplying the digital value with the cosine waveform to generate the real component.

14. The method of claim 13, wherein the digital value of the voltage is separated into real and imaginary components by:

multiplying the digital value with the sine waveform scaled by a calibration scalar to generate the imaginary component; and

multiplying the digital value with the cosine waveform scaled by a calibration scalar to generate the real component.

15. The method of claim 12, wherein summing of the real components is performed by accumulating real components as they are generated.

16. An energy storage cell arrangement, comprising:

a plurality of battery cells coupled in series; and

an impedance detection circuit coupled to one of the plurality of battery cells, the impedance detection circuit including;

a first circuit configured to generate sample values representative of a sine waveform and a cosine waveform at a target frequency and sample rate, with each period of the sine waveform including N sample values and each period of the cosine waveform including N sample values;

a second circuit coupled to an output of the first circuit and configured to input a current into the one of the plurality of battery cells in response to the sample values of the cosine waveform, the current having an amplitude proportional to the sample values of the cosine waveform;

a third circuit coupled to the one of the plurality of battery cells and configured to sample voltage levels across the one battery cell resulting from the current being input into the one battery cell, the sampling voltage levels being at a sample rate equal to the sample rate of the cosine waveform; and

a fourth circuit coupled to an output of the third circuit and configured to;

multiply each voltage level sampled by the third circuit with the sine waveform of the first circuit to generate the imaginary component;

multiply each voltage level sampled by the third circuit with the cosine waveform of the first circuit to generate the real component;

sum the real component of N of the voltage levels sampled by the third circuit to determine a real component of the impedance of the one battery cell; and

sum the imaginary component of the N of the voltage levels sampled to determine an imaginary component of the impedance of the one battery cell.

17. The energy storage cell arrangement of claim 16, wherein the second circuit is further configured to input the current into a second one of the plurality of battery cells in response to the sample values of the cosine waveform.

18. The energy storage cell arrangement of claim 17, further comprising:

a fifth circuit coupled to the second one of the plurality of battery cells and configured to sample voltage levels across the second one battery cell resulting from the current being input into the second one battery cell; and

a sixth circuit coupled to an output of the fifth circuit and configured to;

multiply each voltage level sampled by the fifth circuit with the sine waveform of the first circuit to generate the imaginary component;

multiply each voltage level sampled by the third circuit with the cosine waveform of the first circuit to generate the real component;

sum the real component of N of the voltage levels sampled by the fifth circuit to determine a real component of the impedance of the one battery cell; and

sum the imaginary component of the N of the voltage levels sampled by the fifth circuit to determine an imaginary component of the impedance of the one battery cell.

19. The energy storage cell arrangement of claim 16, wherein

the fourth circuit is configured to scale the sine and cosine waveforms of the first circuit by a calibration scalar;

the sine waveform of the first circuit that is multiplied by the fourth circuit with each voltage level sampled by the third circuit is the sine waveform of the first circuit scaled by the calibration scalar, and

the cosine waveform of the first circuit that is multiplied by the fourth circuit with each voltage level sampled by the third circuit is the cosine waveform of the first circuit scaled by the calibration scalar.