Display device, and method for driving display device

• US 9,129,544 B2
• Filed: 04/04/2012
• Issued: 09/08/2015
• Est. Priority Date: 04/08/2011
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Saitoh, Kohji, Uehata, Masaki, Ozaki, Masami, Yanagi, Toshihiro
• Primary Examiner(s): Merkoulova, Olga
• Application Number:
  US14/009,187
• Publication Number:
  US 20140028654A1
• Time in Patent Office: 1,252 Days
• Field of Search: 345211-214, 345 87-100, 345/204
• US Class Current: 1/1
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/08 Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 5/00 Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators image data processing or generation, in general G06T

Abstract

In order to provide a display device and a method for driving a display device, each of which is capable of repairing a disconnection in a data signal line and further reduces electric power consumption, a display device (1) includes a repair amplifier control section (14) for causing a repair amplifier circuit (12) to operate at a low-performance level during any period within a period from when scanning of pixels in the display area in the display device (1) is finished to when next scanning is started.

Claims

1. A display device comprising:

a data signal line configured to supply, to a display area, a signal necessary for display;

a first wire connectable to the data signal line, the first wire being provided on a first side of the display area, the data signal line receives the signal on the first side of the display area;

a second wire connectable to the data signal line, the second wire being provided on a second side of the display area which is opposite to the first side;

an amplifier circuit which includes an input terminal connected to the first wire and an output terminal connected to the second wire;

a performance controller configured or programmed to cause the amplifier circuit to be in a low-performance state during any period within a period from when scanning of pixels in the display area is finished to when next scanning is started;

a data signal generating circuit configured to generate the signal and to supply the signal (i) to the data signal line and (ii) to the amplifier circuit via the first wire which is connectable to the data signal line; and

a data signal generation ability controller configured or programmed to cause the data signal generating circuit to be in a low-performance state during any period within the period from when the scanning is finished to when the next scanning is started;

wherein

the data signal generation ability controller is configured or programmed to cause the low-performance state of the data signal generating circuit to end before the scanning is started; and

the performance controller is configured or programmed to cause the low-performance state of the amplifier circuit to end before the data signal generation ability controller causes the low-performance state of the data signal generating circuit to end.

2. The display device as set forth in claim 1, wherein the performance controller is configured or programmed to cause the amplifier circuit to be in the low-performance state by suspending operation of the amplifier circuit.

3. The display device as set forth in claim 1, wherein the performance controller is configured or programmed to cause the amplifier circuit to be in the low-performance state during any period within one horizontal period.

4. The display device as set forth in claim 1, wherein the performance controller is configured or programmed to cause the amplifier circuit to be in the low-performance state during any period within one vertical period.

5. The display device as set forth in claim 1, wherein the performance controller is configured or programmed to cause the amplifier circuit to be in the low-performance state over one of a plurality of vertical periods.

6. The display device as set forth in claim 1, wherein the performance controller is configured or programmed to cause the low-performance state of the amplifier circuit to end before the scanning is started.

7. The display device as set forth in claim 1, wherein:

the data signal generation ability controller is configured or programmed to cause the low-performance state of the data signal generating circuit to end before the scanning is started; and

the performance controller is configured or programmed to cause the low-performance state of the amplifier circuit to end at a time when the data signal generation ability controller is configured or programmed to cause the low-performance state of the data signal generating circuit to end.

8. A display device as set forth in claim 1, comprising:

a plurality of disconnection repairing circuits each of which (i) includes the first wire, the second wire, and the amplifier circuit and (ii) is configured to repair a disconnection in the data signal line by connecting the first wire and the second wire to the data signal line,

the plurality of disconnection repairing circuits being configured such that the low-performance state of the amplifier circuit connected to the second wire is finished first, a length of the second wire is greater than a length of the first wire.

9. A display device as set forth in claim 1, comprising:

a plurality of disconnection repairing circuits each of which (i) includes the first wire, the second wire, and the amplifier circuit and (ii) is configured to repair a disconnection in the data signal line by connecting the first wire and the second wire to the data signal line; and

the performance controller is configured or programmed not to reduce performance of the amplifier circuit in at least one of the plurality of disconnection repairing circuits.

10. A display device as set forth in claim 1, comprising a plurality of signal line drive circuits each of which is configured to drive the data signal line by supplying the signal to the data signal line.

11. The display device as set forth in claim 1, wherein the display device is a liquid crystal display device.

12. A method for driving a display device, the display device including:

a data signal line configured to supply, to a display area, a signal necessary for display;

a first wire connectable to the data signal line, the first wire being provided on a first side of the display area, the data signal line receives the signal on the first side of the display device;

a second wire connectable to the data signal line, the second wire being provided on a second side of the display area which is opposite to the first side;

an amplifier circuit which includes an input terminal connected to the first wire and an output terminal connected to the second wire,

said method comprising the steps of;

causing the amplifier circuit to be in a low-performance state during any period within a period from when scanning of pixels in the display area is finished to when next scanning is started;

supplying the signal (i) to the data signal line and (ii) to the amplifier circuit via the first wire which is connectable to the data signal line;

causing a data signal generating circuit to be in a low-performance state during any period within the period from when the scanning is finished to when the next scanning is started;

causing the low-performance state of the data signal generating circuit to end before the scanning is started; and

causing the low-performance state of the amplifier circuit to end before a data signal generation ability controller causes the low-performance state of the data signal generating circuit to end.