Module and assembly with dual DC-links for three-level NPC applications

• US 9,129,824 B2
• Filed: 08/03/2014
• Issued: 09/08/2015
• Est. Priority Date: 03/08/2013
• Status: Active Grant

• Current Assignee: Littelfuse Incorporated
• Original Assignee: IXYS Corporation (Littelfuse Incorporated)
• Inventors: Laschek-Enders, Andreas
• Primary Examiner(s): Gebreyesus, Yosef
• Application Number:
  US14/450,262
• Publication Number:
  US 20140342509A1
• Time in Patent Office: 401 Days
• Field of Search: 438/133, 438/127, 438/197, 257/618, 257/620, 257/401, 257/693, 257/565, 257/378, 257/E27.053, 257/E29.197, 257/E21.382, 257/E21.383, 257/273, 257/361, 257/373, 257/593, 363/56.01, 363/137, 363/132, 363/58, 363/136, 363/89, 363/39, 363/40, 363/50, 363/131, 363/55
• US Class Current: 1/1
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48139 with an intermediate bond, e.g. continuous wire daisy chain
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 24/06 of a plurality of bonding areas
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 27/0647 Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
• CPC Class Codes: H01L 29/7393 Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns
• CPC Class Codes: H02M 7/003 : Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H02M 7/487 : Neutral point clamped inverters

Abstract

A power semiconductor module has four power terminals. An IGBT has a collector connected to the first power terminal and an emitter coupled to the third power terminal. An anti-parallel diode is coupled in parallel with the IGBT. A DC-link is connected between the second and fourth power terminals. The DC-link may involve two diodes and two IGBTs, where the IGBTs are connected in a common collector configuration. The first and second power terminals are disposed in a first line along one side of the module, and the third and fourth power terminals are disposed in a second line along the opposite side of the module. Two identical instances of the module can be interconnected together to form a three-level NPC phase leg having low stray inductances, where the phase leg has two parallel DC-links.

Claims

1. A method of manufacture, comprising:

coupling a collector of a first Insulated Gate Bipolar Transistor (IGBT) to a first power terminal;

coupling an emitter of the first IGBT to a third power terminal;

coupling an anode of a diode to the emitter of the first IGBT;

coupling a cathode of the diode to the collector of the first IGBT;

providing a DC-link between a second power terminal and a fourth power terminal, wherein the DC-link comprises a pair of IGBTs coupled together in a common collector configuration; and

encapsulating the first IGBT, the diode, and the DC-link in a first power semiconductor module package, wherein the first, second, third and fourth power terminals are external terminals of the first power semiconductor module package.

2. The method of claim 1, wherein each of the first, second, third and fourth power terminals has a fastening hole.

3. The method of claim 2, wherein the first and second power terminals are disposed along a first line, wherein the third and fourth power terminals are disposed along a second line, and wherein the first and second lines extend parallel to one another.

4. The method of claim 2, wherein the first IGBT, the diode, and the pair of IGBTs of the DC-link are disposed on a substrate, and wherein the substrate is a part of the first power semiconductor module package.

5. The method of claim 1, wherein the first power semiconductor module package is substantially identical to a second power semiconductor module package, wherein the second power semiconductor module package has a first power terminal, a second power terminal, a third power terminal and a fourth power terminal, the method further comprising:

coupling the third and fourth power terminals of the first power semiconductor module package to the first and second power terminals of the second power semiconductor module package; and

coupling the second power terminal of the first power semiconductor module package to the fourth power terminal of the second power semiconductor module package.

6. The method of claim 1, further comprising:

mounting the first IGBT and the pair of IGBTs on a substrate, wherein the substrate is a part of the first power semiconductor module package.

7. The method of claim 1, wherein a current passing from the first power terminal to the third power terminal passes through at most one transistor, wherein a current passing from the third power terminal to the first power terminal passes through at most one diode and passes through no transistor, wherein a current passing from the second power terminal to the fourth power terminal passes through at most one transistor and at most one diode, and wherein a current passing from the fourth power terminal to the second power terminal passes through at most one transistor and at most one diode.

8. The method of claim 1, wherein the first IGBT and the pair of IGBTs of the DC-link are disposed in an enclosure portion of a housing.

9. The method of claim 1, wherein the first power semiconductor module package has no more than four power terminals that have fastening holes.

10. A method, comprising:

coupling a collector of a first Insulated Gate Bipolar Transistor (IGBT) to a first power terminal;

coupling an emitter of the first IGBT to a third power terminal;

coupling an anode of a diode to the emitter of the first IGBT;

coupling a cathode of the diode to the collector of the first IGBT;

providing a DC-link between a second power terminal and a fourth power terminal, wherein the DC-link comprises a second IGBT and a third IGBT coupled together in a common collector configuration;

mounting the first IGBT, the second IGBT and the third IGBT on a substrate, wherein the substrate is a part of a power semiconductor module package; and

encapsulating the first IGBT, the second IGBT, the third IGBT and the diode in the power semiconductor module package, wherein the first, second, third and fourth power terminals are external terminals of the first power semiconductor module package.

11. The method of claim 10, wherein each of the first, second, third and fourth power terminals has a fastening hole.

12. The method of claim 10, wherein the power semiconductor module package has no more than four power terminals that have fastening holes.

13. The method of claim 10, wherein the first and second power terminals are disposed along a first line, wherein the third and fourth power terminals are disposed along a second line, and wherein the first and second lines extend parallel to one another.

14. The method of claim 10, wherein a current passing from the first power terminal to the third power terminal passes through at most one transistor, wherein a current passing from the third power terminal to the first power terminal passes through at most one diode and passes through no transistor, wherein a current passing from the second power terminal to the fourth power terminal passes through at most one transistor and at most one diode, and wherein a current passing from the fourth power terminal to the second power terminal passes through at most one transistor and at most one diode.

15. The method of claim 10, wherein the first IGBT, the second IGBT and the third IGBT are disposed in an enclosure portion of a housing.

16. The method of claim 10, wherein the power semiconductor module package is substantially identical to a second power semiconductor module package, wherein the second power semiconductor module package has a fifth power terminal, a sixth power terminal, a seventh power terminal and an eighth power terminal, the method further comprising:

coupling the third and fourth power terminals to the fifth and sixth power terminals; and

coupling the second power terminal to the eighth power terminal.

17. The method of claim 10, wherein the power semiconductor module package is substantially identical to a second power semiconductor module package, wherein the second power semiconductor module package has a fifth power terminal, a sixth power terminal, a seventh power terminal and an eighth power terminal, the method further comprising:

coupling a first conductive member to the second power terminal and to the eighth power terminal; and

coupling a second conductive member to the third and fourth power terminals and to the fifth and sixth power terminals.

18. The method of claim 10, further comprising:

coupling a first conductive member to the emitter of the first IGBT; and

coupling a second conductive member to a gate of the first IGBT, wherein the first conductive member and second conductive member extend for a distance in a twisted fashion with respect to one another.

19. The method of claim 18, wherein the first conductive member bridges over the second conductive member.

20. A method, comprising:

coupling a collector of a first Insulated Gate Bipolar Transistor (IGBT) to a first power terminal;

coupling an emitter of the first IGBT to a third power terminal;

coupling an anode of a diode to the emitter of the first IGBT;

coupling a cathode of the diode to the collector of the first IGBT, wherein the first IGBT and the diode are the only devices coupled between the first power terminal and the third power terminal;

providing a DC-link between a second power terminal and a fourth power terminal, wherein the DC-link comprises a second IGBT and a third IGBT coupled together in a common collector configuration;

mounting the first IGBT, the second IGBT and the third IGBT on a substrate, wherein the substrate is a part of a power semiconductor module package; and

encapsulating the first IGBT, the second IGBT, the third IGBT and the diode in the power semiconductor module package, wherein the first, second, third and fourth power terminals are external terminals of the first power semiconductor module package.