Package of finger print sensor and fabricating method thereof

• US 9,129,873 B2
• Filed: 11/18/2013
• Issued: 09/08/2015
• Est. Priority Date: 11/20/2012
• Status: Active Grant

• Current Assignee: Amkor Technology Singapore Holding Pte., Ltd. (Amkor Technology Incorporated)
• Original Assignee: Amkor Technology Incorporated
• Inventors: Kim, Jin Young, Park, No Sun, Kim, Yoon Joo, Lee, Seung Jae, Cha, Se Woong, Kim, Sung Kyu, Yoon, Ju Hoon
• Primary Examiner(s): Mandala, Victor A
• Application Number:
  US14/082,482
• Publication Number:
  US 20140138788A1
• Time in Patent Office: 659 Days
• Field of Search: 257/433
• US Class Current: 1/1
• CPC Class Codes: G06V 40/12 Fingerprints or palmprints
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/211 Disposition
• CPC Class Codes: H01L 2224/214 Connecting portions
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14678 Contact-type imagers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/18162 of a chip with build-up interconnect

Abstract

Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 μm or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.

Claims

1. A semiconductor device comprising:

a semiconductor die comprising a first surface, a second surface opposite the first surface, and side surfaces connecting the first and second surfaces, where the first surface comprises an image sensor and a plurality of bond pads;

a first passivation layer covering the first surface of the semiconductor die and comprising openings that expose the bond pads;

first redistribution layers (RDLs) electrically connected to the bond pads exposed through the first passivation layer;

an encapsulation layer surrounding at least the side surfaces of the semiconductor die;

a plurality of vias electrically connected to the first RDLs at a first end of the vias and passing through the encapsulation layer;

second RDLs electrically connected to a second end of the vias and at least partially formed over the encapsulation layer;

a second passivation layer exposing first portions of the second RDLs and covering second portions of the second RDLs and the encapsulation layer; and

electrical connection structures coupled to the exposed first portions of the second RDLs.

2. The semiconductor device of claim 1, wherein the first surface of the semiconductor die is free of material from the encapsulation layer.

3. The semiconductor device of claim 1, wherein the encapsulation layer covers the side surfaces and the second surface of the semiconductor die.

4. The semiconductor device of claim 1, wherein the second passivation layer covers both the second surface of the semiconductor die and at least a portion of the encapsulation layer.

5. The semiconductor device of claim 1, wherein the electrical connection structures comprise lands of a land grid array.

6. The semiconductor device of claim 1, wherein the electrical connection structures comprise conductive balls.

7. The semiconductor device of claim 1, wherein the semiconductor device comprises a complete packaged finger print sensor without a printed wire board substrate.

8. A semiconductor device comprising:

a semiconductor die comprising a first surface, a second surface opposite the first surface, and side surfaces connecting the first and second surfaces, where the first surface comprises an image sensor and a plurality of bond pads;

an encapsulant surrounding the side surfaces and the second surface of the semiconductor die;

a first passivation layer covering the first surface of the semiconductor die and comprising openings that expose the bond pads;

first redistribution layers (RDLs) electrically connected to the bond pads exposed through the first passivation layer;

a plurality of vias electrically connected to the first RDLs at a first end of the vias and passing through the encapsulant;

second RDLs electrically connected to a second end of the vias and formed on the encapsulant;

a second passivation layer exposing first portions of the second RDLs and covering second portions of the second RDLs and at least a portion of the encapsulant; and

electrical connection structures coupled to the exposed first portions of the second RDLs.

9. The semiconductor device of claim 8, wherein the first RDLs are formed, at least in part, by filling the openings of the first passivation layer.

10. The semiconductor device of claim 8, wherein the first RDLs extend outside a footprint of the semiconductor die.

11. The semiconductor device of claim 8, comprising a protection layer covering the first passivation layer and the first RDLs.

12. The semiconductor device of claim 11, wherein the protection layer and the encapsulant are made of a same material.

13. The semiconductor device of claim 11, wherein the protection layer and the encapsulant are made of different materials with similar respective coefficients of thermal expansion.

14. The semiconductor device of claim 8, wherein at least one of the first RDLs comprises a ground pattern for protecting the image sensor against electrostatic discharge.

15. A semiconductor device comprising:

a semiconductor die comprising a first surface, a second surface opposite the first surface, and side surfaces connecting the first and second surfaces, where the first surface comprises a sensor and a bond pad;

a first passivation layer covering the first surface of the semiconductor die and comprising openings that expose the bond pad;

a first redistribution layer (RDL) electrically connected to the bond pad exposed through the first passivation layer;

an encapsulation layer surrounding at least the side surfaces of the semiconductor die;

a via electrically connected to the first RDL at a first end of the via and passing through the encapsulation layer;

a second RDL electrically connected to a second end of the via and at least partially formed over the encapsulation layer;

a second passivation layer exposing a first portion of the second RDL and covering a second portion of the second RDL and at least a portion of the encapsulation layer;

an electrical connection structure coupled to the exposed first portion of the second RDL; and

a protection layer covering the first passivation layer and the first RDL.

16. The semiconductor device of claim 15, wherein at least a portion of the second RDL is formed directly on the encapsulation layer.

17. The semiconductor device of claim 15, wherein the sensor comprises an image sensor.

18. The semiconductor device of claim 15, wherein the sensor comprises a finger print sensor.

19. The semiconductor device of claim 15, wherein the first RDL comprises a ground pattern for protecting the sensor against electrostatic discharge.

20. The semiconductor device of claim 15, wherein each of the first RDL and the second RDL comprises a respective first end within a footprint of the semiconductor die and a respective second end outside of the footprint of the semiconductor die.