Method of controlling stress in group-III nitride films deposited on substrates

• US 9,129,977 B2
• Filed: 11/29/2011
• Issued: 09/08/2015
• Est. Priority Date: 08/04/2000
• Status: Expired due to Term

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Marchand, Hugues, Moran, Brendan J., Mishra, Umesh K., Speck, James S.
• Primary Examiner(s): Swanson, Walter H
• Application Number:
  US13/306,763
• Publication Number:
  US 20120068191A1
• Time in Patent Office: 1,379 Days
• US Class Current: 1/1
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: H01L 21/02378 Silicon carbide
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0251 Graded layers
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 23/562 Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/0066 with a substrate not being a III-V compound
• CPC Class Codes: H01L 33/0075 comprising nitride compounds
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen

Abstract

Methods of controlling stress in GaN films deposited on silicon and silicon carbide substrates and the films produced therefrom are disclosed. A typical method comprises providing a substrate and depositing a graded gallium nitride layer on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply. A typical semiconductor film comprises a substrate and a graded gallium nitride layer deposited on the substrate having a varying composition of a substantially continuous grade from an initial composition to a final composition formed from a supply of at least one precursor in a growth chamber without any interruption in the supply.

Claims

1. An optoelectronic or electronic device on a group III-nitride layer, wherein the group III-nitride layer is deposited on or above a silicon substrate and has a net compressive stress.

2. The device of claim 1, wherein a surface of the group III-nitride layer has a dislocation density of no more than 10⁹-10¹⁰ cm⁻

2.

3. The device of claim 1, further comprising a buffer layer, wherein the group III-nitride layer comprises GaN.

4. The device of claim 1, wherein the group III-nitride layer is crack free.

5. The device of claim 1, wherein the optoelectronic or electronic device'"'"'s layers are crack free.

6. The device of claim 1, wherein the group III-nitride layer comprises aluminum and gallium.

7. The device of claim 1, wherein the group III-nitride layer comprises AlGaN.

8. The device of claim 1, wherein the group III-nitride layer comprises graded AlGaN.

9. The device of claim 1, wherein the group III-nitride layer comprises a graded layer having a varying composition of a substantially continuous grade from an initial composition to a final composition.

10. The device of claim 1, wherein the group III-nitride layer comprises a graded layer having a varying composition from an initial aluminum composition nitride to a final aluminum composition nitride, wherein the initial aluminum composition nitride has a higher aluminum fraction than the final aluminum composition nitride.

11. The device of claim 10, wherein the initial composition comprises at least 20% Aluminum and the final composition comprises less than 20% Aluminum.

12. The device of claim 10, wherein the varying composition is over 20%-80% of a thickness of the graded layer.

13. The device of claim 10, wherein the varying composition is over at least 80% of a thickness of the graded layer.

14. The device of claim 10, wherein the final aluminum composition nitride is Gallium Nitride.

15. The device of claim 1, further comprising one or more GaN layers between the group III-nitride layer and the optoelectronic or electronic device, wherein the GaN layers are deposited to a thickness for fabricating a free-standing GaN substrate.

16. The device of claim 1, wherein the group III-nitride layer is a single crystal group III-nitride layer.

17. The device of claim 1, wherein the group III-nitride layer forms a substrate for the device.

18. The device of claim 17, wherein the substrate is a GaN substrate.

19. The device of claim 1, wherein the device is the optoelectronic device.

20. A method of fabricating a device, comprising:

depositing a group III-nitride layer on or above a silicon substrate, wherein the group III-nitride layer has a net compressive stress; and

depositing an optoelectronic or electronic device on the group III-nitride layer.

21. The method of claim 20, wherein the depositing is such that a surface of the group III-nitride layer comprises a dislocation density of no more than 10⁹-10¹⁰ cm⁻

2.

22. The method of claim 20, further comprising:

combining the depositing of the group III-nitride layer with a deposition of a buffer layer in a single deposition step on the silicon substrate, wherein the group III-nitride layer comprises GaN.

23. The method of claim 20, wherein the depositing is such that the group III-nitride layer is crack free.

24. The method of claim 20, wherein the depositing is such that the optoelectronic or electronic device is crack free.

25. The method of claim 20, wherein the group III-nitride layer comprises aluminum and gallium.

26. The method of claim 20, wherein the group III-nitride layer comprises AlGaN.

27. The method of claim 20, wherein the group III-nitride layer comprises graded AlGaN.

28. The method of claim 20, wherein the group III-nitride layer comprises a graded layer having a varying composition of a substantially continuous grade from an initial composition to a final composition.

29. The method of claim 20, wherein the group III-nitride layer comprises a graded layer having a varying composition from an initial aluminum composition nitride to a final aluminum composition nitride, wherein the initial aluminum composition nitride has a higher aluminum fraction than the final aluminum composition nitride.

30. The method of claim 29, wherein the initial composition has higher Aluminum content than the final composition.

31. The method of claim 29, wherein the initial composition comprises at least 20% Aluminum and the final composition comprises less than 20% Aluminum.

32. The method of claim 29, wherein the varying composition is over 20%-80% of a thickness of the graded layer.

33. The method of claim 29, wherein the varying composition is over at least 80% of a thickness of the graded layer.

34. The method of claim 29, wherein the final aluminum composition nitride is Gallium Nitride.

35. The method of claim 20, further comprising:

depositing one or more GaN layers on the group III-nitride layer; and

depositing the optoelectronic or electronic device on the one or more GaN layers, wherein the GaN layers are deposited to a thickness for fabricating a free-standing GaN substrate.

36. The method of claim 20, further comprising removing the silicon substrate after the deposition of the group III-nitride layer.

37. The method of claim 20, further comprising forming a substrate with the group III-nitride layer.

38. The method of claim 37, wherein the substrate is a GaN substrate.

39. The method of claim 20, wherein the group III-nitride layer is a single crystal group III-nitride layer.

40. The method of claim 29, further comprising varying a composition of the Group III nitride layer continuously without any interruption in precursor supply, wherein the initial aluminum composition is adjacent the silicon substrate.

41. The method of claim 22, further comprising varying a composition of the Group III nitride layer continuously without any interruption in precursor supply, wherein only silicon, gallium, and nitrogen precursors are used, and the composition consists essentially of silicon, gallium, and nitrogen.

42. A transistor formed on a group III-nitride layer, wherein the group III-nitride layer is deposited on or above a silicon substrate and has a net compressive stress.

43. The transistor of claim 42, wherein the transistor is a field-effect transistor.

44. The transistor of claim 42, wherein the group III-nitride layer comprises GaN.

45. The transistor of claim 42, wherein the group III-nitride layer comprises a graded layer having a varying composition from an initial aluminum composition nitride to a final aluminum composition nitride, wherein the initial aluminum composition nitride has a higher aluminum fraction than the final aluminum composition nitride.