Semiconductor device and manufacturing method thereof

• US 9,130,044 B2
• Filed: 06/21/2012
• Issued: 09/08/2015
• Est. Priority Date: 07/01/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Okazaki, Yutaka, Isobe, Atsuo
• Primary Examiner(s): Huynh, Andy
• Assistant Examiner(s): Yechuri, Sitaramarao S
• Application Number:
  US13/529,125
• Publication Number:
  US 20130001557A1
• Time in Patent Office: 1,174 Days
• Field of Search: 257/57
• US Class Current: 1/1
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

The invention relates to a semiconductor device including an oxide semiconductor layer, a gate electrode overlapping with a channel formation region of the oxide semiconductor layer, and a source electrode or a drain electrode overlapping with a first region of the oxide semiconductor layer, and a second region between the channel formation region and the first region. An upper layer of the second region includes a microvoid. The microvoid is formed by adding nitrogen to the upper layer of the second region. Thus, upper layer of the second region contains lager amount of nitrogen than a lower layer of the second region.

Claims

1. A semiconductor device comprising:

a substrate;

an oxide semiconductor layer over the substrate;

a gate insulating film over the oxide semiconductor layer;

a gate electrode over a channel formation region of the oxide semiconductor layer with the gate insulating film provided therebetween;

an electrode provided over a first region of the oxide semiconductor layer; and

a second region of the oxide semiconductor layer between the channel formation region and the first region,

wherein a thickness of the oxide semiconductor layer is greater than or equal to 20 nm and less than or equal to 100 nm,

wherein the electrode is a source electrode or a drain electrode,

wherein the electrode and the gate electrode do not overlap the second region of the oxide semiconductor layer,

wherein the second region comprises an upper region in contact with the gate insulating film and a lower region between the upper region and the substrate,

wherein the upper region includes a microvoid,

wherein the lower region is an n-type region,

wherein hydrogen in the oxide semiconductor layer is adsorbed to an inner wall of the microvoid, and

wherein each of the lower region, the first region and the channel formation region does not include a microvoid.

2. The semiconductor device according to claim 1, wherein a diameter of the microvoid is larger than or equal to 2 nm and smaller than or equal to 7 nm.

3. The semiconductor device according to claim 1, wherein the microvoid is a region which has low density compared with the surrounding thereof or an empty space.

4. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer contains indium, gallium and zinc, and

wherein the oxide semiconductor layer comprises crystals whose c-axes are aligned.

5. A semiconductor device comprising:

a substrate;

an oxide semiconductor layer over the substrate;

a gate insulating film provided over the oxide semiconductor layer;

a gate electrode over a channel formation region of the oxide semiconductor layer with the gate insulating film provided therebetween;

an electrode provided over a first region of the oxide semiconductor layer; and

a second region of the oxide semiconductor layer between the channel formation region and the first region,

wherein a thickness of the oxide semiconductor layer is greater than or equal to 20 nm and less than or equal to 100 nm,

wherein the electrode is a source electrode or a drain electrode,

wherein the electrode and the gate electrode do not overlap the second region of the oxide semiconductor layer,

wherein the second region comprises an upper region in contact with the gate insulating film and a lower region between the upper region and the substrate,

wherein the upper region contains more nitrogen than each of the lower region, the first region and the channel formation region,

wherein the upper region includes a microvoid,

wherein the lower region is an n-type region,

wherein hydrogen in the oxide semiconductor layer is adsorbed to an inner wall of the microvoid, and

wherein each of the lower region, the first region and the channel formation region does not include a microvoid.

6. The semiconductor device according to claim 5, wherein the concentration of nitrogen in the upper region of the second region is 1×

10²¹ cm<sup>−

3</sup> or more.

7. The semiconductor device according to claim 5, wherein a diameter of the microvoid is larger than or equal to 2 nm and smaller than or equal to 7 nm.

8. The semiconductor device according to claim 5, wherein the microvoid is a region which has low density compared with the surrounding thereof or an empty space.

9. The semiconductor device according to claim 5,

wherein the oxide semiconductor layer contains indium, gallium and zinc, and

wherein the oxide semiconductor layer comprises crystals whose c-axes are aligned.

10. A semiconductor device comprising:

a substrate;

an oxide semiconductor layer over the substrate;

a gate insulating film provided over the oxide semiconductor layer;

a gate electrode over a channel formation region of the oxide semiconductor layer with the gate insulating film provided therebetween;

an electrode provided over a first region of the oxide semiconductor layer; and

a second region of the oxide semiconductor layer between the channel formation region and the first region,

wherein a thickness of the oxide semiconductor layer is greater than or equal to 20 nm and less than or equal to 100 nm,

wherein the electrode is a source electrode or a drain electrode,

wherein the electrode and the gate electrode do not overlap the second region of the oxide semiconductor layer,

wherein the second region comprises an upper region in contact with the gate insulating film and a lower region between the upper region and the substrate,

wherein the upper region has a maximum value of nitrogen concentration in the second region,

wherein the upper region includes a microvoid,

wherein the lower region is an n-type region,

wherein hydrogen in the oxide semiconductor layer is adsorbed to an inner wall of the microvoid, and

wherein each of the lower region, the first region and the channel formation region does not include a microvoid.

11. The semiconductor device according to claim 10, wherein the concentration of nitrogen in the upper region of the second region is 1×

10²¹ cm<sup>−

3</sup> or more.

12. The semiconductor device according to claim 10, wherein a diameter of the microvoid is larger than or equal to 2 nm and smaller than or equal to 7 nm.

13. The semiconductor device according to claim 10, wherein the microvoid is a region which has low density compared with the surrounding thereof or an empty space.

14. The semiconductor device according to claim 10,

wherein the oxide semiconductor layer contains indium, gallium and zinc, and

wherein the oxide semiconductor layer comprises crystals whose c-axes are aligned.