Substrate for power module having uniform parallel switching characteristic and power module including the same

• US 9,130,095 B2
• Filed: 06/18/2013
• Issued: 09/08/2015
• Est. Priority Date: 11/01/2012
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Che-Heung, Byun, Young-hun, Booh, Seong-woon
• Primary Examiner(s): Riyami, Abdullah
• Assistant Examiner(s): Imas, Vladimir
• Application Number:
  US13/920,732
• Publication Number:
  US 20140120774A1
• Time in Patent Office: 812 Days
• Field of Search: 439/626, 439/76.2
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48139 with an intermediate bond, e.g. continuous wire daisy chain
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4846 with multiple bonds on the same bonding area
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/3735 Laminates or multilayers, e.g. direct bond copper ceramic substrates
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/19107 off-chip wires
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 31/0504 : specially adapted for series or parallel connection of solar cells in a module
• CPC Class Codes: Y02E 10/50 : Photovoltaic [PV] energy

Abstract

Provided are a substrate for a power module having a uniform parallel switching characteristic and a power module including the same. The substrate for the power module includes a plurality of areas on which input terminals are mounted, an area on which an output terminal is mounted, a plurality of areas on which devices are mounted, and an area on which a plurality of control pins are mounted. The plurality of areas on which the devices are mounted are bilaterally symmetric about the area on which the plurality of control pins are mounted. The plurality of areas on which the input terminals are mounted, respectively, are provided into three areas spaced apart from each other and bilaterally symmetric to each other. The plurality of areas on which the device are mounted are bilaterally symmetric about the area on which the control pins are mounted.

Claims

1. A substrate comprising:

a plurality of input terminal areas on which input terminals are mounted;

a plurality of output terminal areas on which output terminals are mounted;

a plurality of device areas, at least one devices being mounted on respective ones of the plurality of device areas; and

a plurality of control pin areas on which a plurality of control pins are mounted, wherein

the plurality of control pin areas are disposed approximately along a center line connecting a central portion of the plurality of input terminal areas and a central portion of the plurality of output terminal areas, and

the plurality of device areas are bilaterally symmetric about the plurality of control pin areas therebetween.

2. The substrate of claim 1, wherein the plurality of input terminal areas comprise:

three areas spaced apart from each other and are symmetric about the center line.

3. The substrate of claim 1, wherein,

the plurality of device areas comprise four areas, and

two areas of the four areas are conductive layer areas spaced apart from each other with the center line therebetween, and a remaining two areas are a same conductive layer area crossing the center line.

4. The substrate of claim 1, further comprising:

a second substrate is mounted on a portion of the plurality of control pin areas.

5. The substrate of claim 4, wherein the second substrate comprises:

an insulation layer contacting the portion of the plurality of control pin areas; and

a plurality of conductive layers spaced apart from each other, the plurality of conductive layers being disposed on the insulation layer.

6. A power module comprising:

a substrate including,

a plurality of input teitainal areas configured to mount input terminals thereon,

a plurality of output terminal areas configured to mount output terminals thereon,

a plurality of device areas configured to mount devices thereon, and

a plurality of control pin areas configured to mount control pins thereon, wherein the plurality of control pin areas are disposed approximately along a center line connecting a central portion of the plurality of input terminal areas and a central portion of the plurality of output terminal areas, and the plurality of device areas are bilaterally symmetric about the plurality of control pin areas therebetween;

a plurality of first devices mounted on the plurality of device areas;

a plurality of first input terminals mounted on the plurality of input terminal areas;

a plurality of first control pins mounted on the plurality of control pin areas; and

a plurality of first output terminals mounted on the plurality of output terminal areas.

7. The power module of claim 6, further comprising:

a second substrate mounted on a portion of the plurality of control pin areas.

8. The power module of claim 7, wherein the second substrate comprises:

an insulation layer contacting the portion of the plurality of control pin areas; and

a plurality of conductive layers disposed on the insulation layer, the plurality of conductive layers spaced apart from each other.

9. The power module of claim 8, wherein a portion of the plurality of first control pins are mounted on the plurality of conductive layers.

10. The power module of claim 6, wherein the plurality of input terminal areas comprise:

three areas spaced apart from each other and being bilaterally symmetric about the center line.

11. The power module of claim 10, wherein the plurality of first input terminals are three first input terminals mounted on respective one of the three areas, and two of the three first input tenninals are configured to receive a voltage having a same polarity.

12. The power module of claim 11, wherein the three first input terminals are bilaterally symmetric about the center line.

13. The power module of claim 12, wherein the three first input terminals comprise:

two coupling parts.

14. The power module of claim 7, wherein the second substrate, a portion of the first devices and one of the first input telininals are mounted on a same conductive layers.

15. A power module comprising:

a substrate including device modules and control pins, the control pins having first ends mounted to the substrate and the device modules being symmetrically mounted to the substrate with respect to the control pins, the control pins configured to receive a signal to control switching of the modules;

input terminals electrically connected to the substrate, the input terminals being symmetrically mounted with respect to the control pins; and

an output terminal electrically connected to the substrate, the output terminal being symmetrically mounted with respect to the control pins,

wherein the control pins are mounted approximately along a center of the substrate.

16. The power module of claim 15, wherein a variation in an inductance in each of the device modules is less than 15%.

17. The power module of claim 15, further comprising:

a second substrate mounted to the substrate, the second substrate electrically insulated from the device modules.

18. The power module of claim 15, wherein the input terminals include at least three input terminals and two of the three input teiminals are configured to receive a voltage having a same polarity and a third of the three input terminals is configured to receive a voltage having a polarity opposite the same polarity.

19. The power module of claim 15, wherein the device modules include an insulated-gate bipolar transistor IGBT.