Impedance matching circuit capable of broadband operation

• US 9,130,534 B2
• Filed: 02/16/2011
• Issued: 09/08/2015
• Est. Priority Date: 02/23/2010
• Status: Active Grant

• Current Assignee: Qualcomm Technologies Incorporated (Qualcomm, Inc.)
• Original Assignee: Qualcomm Technologies Incorporated (Qualcomm, Inc.)
• Inventors: Schmidhammer, Edgar, Tikka, Pasi
• Primary Examiner(s): MANCUSO, HUEDUNG XUAN CAO
• Application Number:
  US13/578,801
• Publication Number:
  US 20130009841A1
• Time in Patent Office: 1,665 Days
• Field of Search: 343/853, 343/861, 333 32- 33, 333/101, 455/82, 455/132
• US Class Current: 1/1
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/111 the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03H 2007/386 Multiple band impedance matching
• CPC Class Codes: H03H 7/38 Impedance-matching networks
• CPC Class Codes: H03H 7/383 comprising distributed impedance elements together with lumped impedance elements
• CPC Class Codes: H04B 1/0057 using diplexing or multiplexing filters for selecting the desired band
• CPC Class Codes: H04B 1/52 Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa

Abstract

A broadband-operable impedance filter has capacitive elements of variable capacitance in the signal path, an inductive element in a parallel path connected in parallel to the signal path, and inductive elements in the ground path. The impedance filter allows communication in a first frequency band and the reception of HF signals in a second frequency band.

Claims

1. An impedance matching circuit, comprising:

a signal port;

a load port for coupling to at least one antenna;

a signal path coupled between the signal port and the load port;

an intermediate node arranged in the signal path;

a first variable-capacitance capacitive element coupled between the signal port and the intermediate node;

a second variable-capacitance capacitive element coupled between the intermediate node and the load port;

a first inductive element coupled between the intermediate node and a ground node;

a second inductive element coupled between the load port and the ground node; and

a third inductive element coupled between the signal port and the load port in a parallel path parallel to the signal path.

2. The impedance matching circuit according to claim 1, wherein the first inductive element has an inductance between 0.5 nH and 2 nH, the second inductive element has an inductance between 1 nH and 3 nH, and the third inductive element has an inductance between 1 nH and 3 nH.

3. The impedance matching circuit according to claim 2, wherein an adjustment range of capacitance for the first variable-capacitance capacitive element is in the range from 0.5 pF to 3 pF and the adjustment range of capacitance of the second variable-capacitance capacitive element is in the range from 1 pF to 10 pF.

4. The impedance matching circuit according to claim 1, wherein an adjustment range of capacitance for the first variable-capacitance capacitive element is in the range from 0.5 pF to 3 pF and the adjustment range of capacitance of the second variable-capacitance capacitive element is in the range from 1 pF to 10 pF.

5. The impedance matching circuit according to claim 1, wherein the load port is configured to be coupled to the at least one antenna via a microstripline.

6. The impedance matching circuit according to claim 1, wherein the at least one antenna includes a first antenna and a second antenna, and the load port is configured to be selectively coupled to the first antenna and/or the second antenna via a switching unit.

7. The impedance matching circuit according to claim 1, further comprising a microstripline coupled to the load port.

8. The impedance matching circuit according to claim 7, wherein the load port is coupled to the at least one antenna via the microstripline.

9. The impedance matching circuit according to claim 1, wherein the impedance matching circuit is connected in a mobile communication appliance and allows transmission and reception in the 1 GHz band and at the same time reception in the 2 GHz band.

10. The impedance matching circuit according to claim 9, wherein adaptive regulation of the impedance matching takes place in the 1 GHz band by variation of capacitances of the first and second variable-capacitance capacitive elements.

11. The impedance matching circuit according to claim 9, wherein call data are sent and received in the 1 GHz band and a diversity signal is received in the 2 GHz band.

12. The impedance matching circuit according to claim 1, wherein:

the at least one antenna includes a first antenna and a second antenna;

the load port is coupled to the first antenna and wherein the load port is coupled to a second antenna via a switch; and

the switch couples the load port to the second antenna when reception in the 2 GHz band is better via the second antenna than via the first antenna.

13. The impedance matching circuit according to claim 1, wherein call data are sent and received in the 1 GHz band and a diversity signal is received in the 2 GHz band.

14. The impedance matching circuit according to claim 1, further comprising a first switch coupled to the load port and a second switch coupled to the load port.

15. The impedance matching circuit according to claim 14, wherein the at least one antenna includes a first antenna and a second antenna, and the load port is coupled to the first antenna through the first switch and the load port is coupled to the second antenna through the second switch.

16. The impedance matching circuit according to claim 15, further comprising a first microstripline coupled between the load port and the first antenna and a second microstripline coupled between the load port and the second antenna.

17. A circuit, comprising:

a signal port;

a load port;

a signal path coupled between the signal port and the load port;

an intermediate node arranged in the signal path;

a first variable-capacitance capacitive element coupled between the signal port and the intermediate node;

a second variable-capacitance capacitive element coupled between the intermediate node and the load port;

a first inductive element coupled between the intermediate node and a ground node;

a second inductive element coupled between the load port and the ground node;

a third inductive element coupled between the signal port and the load port in a parallel path parallel to the signal path;

an antenna coupled to the load port; and

a microstripline coupled between the load port and the antenna.

18. A circuit, comprising:

a signal port;

a load port;

a signal path coupled between the signal port and the load port;

an intermediate node arranged in the signal path;

a first variable-capacitance capacitive element coupled between the signal port and the intermediate node;

a second variable-capacitance capacitive element coupled between the intermediate node and the load port;

a first inductive element coupled between the intermediate node and a ground node;

a second inductive element coupled between the load port and the ground node;

a third inductive element coupled between the signal port and the load port in a parallel path parallel to the signal path;

a first antenna coupled to the load port;

a second antenna coupled to the load port;

a first switch coupled between the load port and the first antenna; and

a second switch coupled between the load port and the second antenna.

19. The circuit according to claim 18, further comprising:

a first microstripline coupled between the first switch and the first antenna; and

a second microstripline coupled between the second switch and the second antenna.