FinFET-based boosting supply voltage circuit and method
First Claim
1. A voltage boosting circuit for generating an output voltage having a magnitude that is greater than a voltage generated by a voltage supply of the voltage boosting circuit, the voltage boosting circuit comprising:
- a first transistor having a first polarity type, the first transistor being a planar transistor, a first source/drain of the first transistor being adapted for connection with a voltage supply of the voltage boosting circuit, and a gate of the first transistor being adapted to receive a control signal supplied to the voltage boosting circuit; and
a second transistor having a gate formed in at least two planes, a first source/drain of the second transistor being adapted for connection with the voltage supply, a gate of the second transistor being adapted to receive the control signal, and a second source/drain of the second transistor being connected with a second source/drain of the first transistor and forming an output of the voltage boosting circuit for generating a boosted supply voltage as a function of the control signal.
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Accused Products
Abstract
A memory circuit includes a voltage boosting circuit for generating a voltage that exceeds a voltage supply of the voltage boosting circuit. The voltage boosting circuit includes a first transistor having a first polarity type and a second transistor having a second polarity type opposite the first transistor. The first transistor is a planar transistor, a source of the first transistor being connected with the voltage supply, and a gate of the first transistor receiving a control signal. The second transistor includes a gate formed in at least two planes. A source of the second transistor is connected with the voltage supply, a gate of the second transistor receives the control signal, and a drain of the second transistor is connected with a drain of the first transistor and forms an output of the voltage boosting circuit for generating a boosted supply voltage as a function of the control signal.
12 Citations
20 Claims
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1. A voltage boosting circuit for generating an output voltage having a magnitude that is greater than a voltage generated by a voltage supply of the voltage boosting circuit, the voltage boosting circuit comprising:
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a first transistor having a first polarity type, the first transistor being a planar transistor, a first source/drain of the first transistor being adapted for connection with a voltage supply of the voltage boosting circuit, and a gate of the first transistor being adapted to receive a control signal supplied to the voltage boosting circuit; and a second transistor having a gate formed in at least two planes, a first source/drain of the second transistor being adapted for connection with the voltage supply, a gate of the second transistor being adapted to receive the control signal, and a second source/drain of the second transistor being connected with a second source/drain of the first transistor and forming an output of the voltage boosting circuit for generating a boosted supply voltage as a function of the control signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A memory circuit, comprising:
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at least one word line and a plurality of bit lines; a plurality of memory cells coupled with the word and bit lines, a given one of the memory cells being individually accessed by selectively activating a unique pair of a corresponding one of the bit lines and at least one word line coupled with the given memory cell; and a voltage boosting circuit connected with at least a subset of the memory cells for generating an output voltage having a magnitude that is greater than a voltage generated by a voltage supply of the memory circuit, the voltage boosting circuit comprising; a first transistor having a first polarity type, the first transistor being a planar transistor, a first source/drain of the first transistor being adapted for connection with the voltage supply of the memory circuit, and a gate of the first transistor being adapted to receive a first control signal supplied to the voltage boosting circuit; and a second transistor having a gate formed in at least two planes, a first source/drain of the second transistor being adapted for connection with the voltage supply, a gate of the second transistor being adapted to receive the first control signal, and a second source/drain of the second transistor being connected with a second source/drain of the first transistor and forming an output of the voltage boosting circuit for generating a boosted supply voltage as a function of the first control signal. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification