Semiconductor device

• US 9,136,391 B2
• Filed: 08/29/2014
• Issued: 09/15/2015
• Est. Priority Date: 01/22/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun
• Primary Examiner(s): HA, NATHAN W
• Application Number:
  US14/472,605
• Publication Number:
  US 20140367679A1
• Time in Patent Office: 382 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches

Abstract

The semiconductor device includes a power element which is in an on state when voltage is not applied to a gate, a switching field-effect transistor for applying first voltage to the gate of the power element, and a switching field-effect transistor for applying voltage lower than the first voltage to the gate of the power element. The switching field-effect transistors have small off-state current.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer;

a gate overlapping with the oxide semiconductor layer;

a first conductive layer electrically connected to the oxide semiconductor layer and overlapping with the gate;

a second conductive layer over the oxide semiconductor layer and overlapping with the gate, the second conductive layer electrically connected to the oxide semiconductor layer;

an insulating layer over the second conductive layer, the insulating layer including an opening portion; and

a wiring electrically connected to the second conductive layer through the opening portion,

wherein the opening portion is positioned between a first part of the first conductive layer and a second part of the first conductive layer.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer includes a circular shape.

3. The semiconductor device according to claim 1, wherein the gate is over the oxide semiconductor layer.

4. The semiconductor device according to claim 1, wherein the gate is over the insulating layer.

5. The semiconductor device according to claim 1, wherein the oxide semiconductor layer is over the first conductive layer.

6. The semiconductor device according to claim 1, wherein the oxide semiconductor layer covers an outer edge portion of the first conductive layer.

7. The semiconductor device according to claim 1, wherein an outer edge portion of the gate is positioned on an inner side than an outer edge portion of the first conductive layer.

8. The semiconductor device according to claim 1, wherein an outer edge portion of the second conductive layer is positioned on an inner side than an outer edge portion of the gate.

9. The semiconductor device according to claim 1, wherein the gate comprises a region between the first conductive layer and the second conductive layer.

10. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

11. A semiconductor device comprising:

an oxide semiconductor layer;

a gate overlapping with the oxide semiconductor layer, the gate including a first opening portion;

a first conductive layer electrically connected to the oxide semiconductor layer;

a second conductive layer over the oxide semiconductor layer, the second conductive layer electrically connected to the oxide semiconductor layer;

an insulating layer over the second conductive layer, the insulating layer including a second opening portion; and

a wiring electrically connected to the second conductive layer through the second opening portion,

wherein the second opening portion is positioned between a first part of the first conductive layer and a second part of the first conductive layer.

12. The semiconductor device according to claim 11, wherein the first opening portion and the second opening portion overlap with each other.

13. The semiconductor device according to claim 11, wherein the second conductive layer overlaps with an inner edge portion of the gate.

14. The semiconductor device according to claim 11, wherein the oxide semiconductor layer includes a circular shape.

15. The semiconductor device according to claim 11, wherein the gate is over the oxide semiconductor layer.

16. The semiconductor device according to claim 11, wherein the gate is over the insulating layer.

17. The semiconductor device according to claim 11, wherein the oxide semiconductor layer is over the first conductive layer.

18. The semiconductor device according to claim 11, wherein the oxide semiconductor layer covers an outer edge portion of the first conductive layer.

19. The semiconductor device according to claim 11, wherein an outer edge portion of the gate is positioned on an inner side than an outer edge portion of the first conductive layer.

20. The semiconductor device according to claim 11, wherein an outer edge portion of the second conductive layer is positioned on an inner side than an outer edge portion of the gate.

21. The semiconductor device according to claim 11, wherein the gate comprises a region between the first conductive layer and the second conductive layer.

22. The semiconductor device according to claim 11, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

23. A semiconductor device comprising:

an oxide semiconductor layer;

a gate overlapping with the oxide semiconductor layer, the gate including a first opening portion;

a first conductive layer electrically connected to the oxide semiconductor layer and overlapping with the gate;

a second conductive layer over the oxide semiconductor layer and overlapping with the gate, the second conductive layer electrically connected to the oxide semiconductor layer;

an insulating layer over the second conductive layer, the insulating layer including a second opening portion; and

a wiring electrically connected to the second conductive layer through the second opening portion,

wherein the second opening portion is positioned between a first part of the first conductive layer and a second part of the first conductive layer.

24. The semiconductor device according to claim 23, wherein the first opening portion and the second opening portion overlap with each other.

25. The semiconductor device according to claim 23, wherein the second conductive layer overlaps with an inner edge portion of the gate.

26. The semiconductor device according to claim 23, wherein the oxide semiconductor layer includes a circular shape.

27. The semiconductor device according to claim 23, wherein the gate is over the oxide semiconductor layer.

28. The semiconductor device according to claim 23, wherein the gate is over the insulating layer.

29. The semiconductor device according to claim 23, wherein the oxide semiconductor layer is over the first conductive layer.

30. The semiconductor device according to claim 23, wherein the oxide semiconductor layer covers an outer edge portion of the first conductive layer.

31. The semiconductor device according to claim 23, wherein an outer edge portion of the gate is positioned on an inner side than an outer edge portion of the first conductive layer.

32. The semiconductor device according to claim 23, wherein an outer edge portion of the second conductive layer is positioned on an inner side than an outer edge portion of the gate.

33. The semiconductor device according to claim 23, wherein the gate comprises a region between the first conductive layer and the second conductive layer.

34. The semiconductor device according to claim 23, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.