Semiconductor light emitting device and method for manufacturing same

• US 9,136,437 B2
• Filed: 05/16/2014
• Issued: 09/15/2015
• Est. Priority Date: 03/09/2010
• Status: Active Grant

• Current Assignee: Alpad Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kojima, Akihiro
• Primary Examiner(s): Rodela, Eduardo A
• Application Number:
  US14/279,864
• Publication Number:
  US 20140246691A1
• Time in Patent Office: 487 Days
• Field of Search: 257/79, 257/95, 257/98, 257/99, 257/100, 257/E33.062, 257/E33.065, 438/22, 438/26, 438/29, 438/40, 438/41, 438/42
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/02 characterised by the semiconductor bodies
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/382 the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/385 the electrode extending at least partially onto a side surface of the semiconductor body
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/50 Wavelength conversion elements
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

According to one embodiment, a semiconductor light emitting device includes, a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a first interconnection, and a second interconnection. The first semiconductor layer has a first major surface, a second major surface provided on an opposite side to the first major surface, a protrusion selectively provided on the second major surface, and a trench formed from the second major surface to the first major surface. The second semiconductor layer is stacked on the protrusion of the first semiconductor layer and includes a light emitting layer. The first electrode is provided on the second major surface of the first semiconductor layer and a side surface of the trench. The second electrode is provided on a surface of the second semiconductor layer on an opposite side to the first semiconductor layer.

Claims

1. A semiconductor light emitting device comprising:

a semiconductor layer having a first major surface, a second major surface provided on an opposite side to the first major surface, a protrusion including a light emitting layer and a depression provided on the second major surface, and a trench dividing a bottom surface of the depression;

a first electrode provided on a side surface of the trench;

a second electrode provided on a surface of the protrusion of the semiconductor layer;

a first interconnection provided on a surface of the first electrode, the first interconnection provided on the first electrode in the trench; and

a second interconnection provided on a surface of the second electrode.

2. The device of claim 1, wherein the first electrode is provided also at a bottom of the trench.

3. The device of claim 1, wherein the protrusion is provided on both sides of the trench in a width direction.

4. The device of claim 1, further comprising:

an insulating film provided on a side surface of the protrusion around the bottom surface of the depression.

5. The device of claim 1, further comprising:

a first metal pillar provided on a surface of the first interconnection on an opposite side to the first electrode; and

a second metal pillar provided on a surface of the second interconnection on an opposite side to the second electrode.

6. The device of claim 5, further comprising:

a resin covering a periphery of each of the first metal pillar and the second metal pillar.

7. The device of claim 1, further comprising:

a phosphor layer opposed to the first major surface of the first semiconductor layer.

9. The device of claim 1, wherein the semiconductor layer is formed on a substrate and removed from the substrate.

10. The device of claim 9, wherein the semiconductor layer is grown as a crystal on the substrate and removed from the substrate.

12. The device of claim 1, wherein the first electrode is in contact with the side surface of the trench.

13. The device of claim 1, wherein the semiconductor layer had been formed on a substrate.

8. A semiconductor light emitting device comprising:

a semiconductor layer having a first major surface, a second major surface provided on an opposite side to the first major surface, a protrusion including a light emitting layer and a depression provided on the second major surface, and a trench dividing a portion of the semiconductor layer to have two side surfaces facing each other, the trench provided in the depression extending in a straight line, the trench not provided in the protrusion;

a first electrode provided on the two side surfaces of the trench;

a second electrode provided on a surface of the protrusion of the semiconductor layer;

a first interconnection provided on a surface of the first electrode; and

a second interconnection provided on a surface of the second electrode.

11. A semiconductor light emitting device comprising:

a semiconductor layer having a first major surface, a second major surface provided on an opposite side to the first major surface, a protrusion including a light emitting layer and a depression provided on the second major surface, and a trench dividing a bottom surface of the depression;

a first electrode provided on a side surface of the trench;

a second electrode provided on a surface of the protrusion of the semiconductor layer;

a first interconnection provided on a surface of the first electrode;

a second interconnection provided on a surface of the second electrode; and

a phosphor layer provided on the first major surface side of the semiconductor layer without a substrate between the first major surface and the phosphor layer.