Converter including a bootstrap circuit and method

• US 9,136,836 B2
• Filed: 03/21/2011
• Issued: 09/15/2015
• Est. Priority Date: 03/21/2011
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Chen, Weiyun, Stapleton, Michael A., Feng, Xiaogang
• Primary Examiner(s): Chen, Sibin
• Application Number:
  US13/052,911
• Publication Number:
  US 20120242393A1
• Time in Patent Office: 1,639 Days
• US Class Current: 1/1
• CPC Class Codes: H03K 17/165 by feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 2217/0063 High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load

Abstract

In accordance with an embodiment, a converter includes a circuit and method for charging a bootstrap capacitor. The circuit monitors a voltage across the bootstrap capacitor and enables charging the bootstrap capacitor in response to the voltage across the bootstrap capacitor being less than a threshold voltage.

Claims

1. A bootstrap circuit suitable for use in a converter, comprising:

a low side transistor having a control terminal and first and second current carrying terminals;

a high side transistor having a control terminal and first and second current carrying terminals, the first current carrying terminal of the high side transistor coupled to the second current carrying terminal of the low side transistor to form a node;

a sense circuit having first, second, third, and fourth input terminals and an output terminal, the first input terminal of the sense circuit coupled to the node and the output terminal of the sense circuit configured to drive the control terminal of the low side transistor;

an energy storage element having a first terminal and a second terminal, the first terminal of the energy storage element directly connected to the first input terminal of the sense circuit and the second terminal of the energy storage element directly connected to the second input terminal of the sense circuit; and

a first logic gate having first and second input terminals and an output terminal, the first input terminal of the first logic gate coupled to the output terminal of the sense circuit, the second input terminal of the first logic gate coupled to the fourth input terminal of the sense circuit, and the output terminal of the first logic gate coupled to the control terminal of the high side transistor.

2. The bootstrap circuit of claim 1, wherein the sense circuit comprises:

an amplifier having first and second input terminals and an output terminal, wherein the first and second input terminals of the amplifier serve as the first and second input terminals of the sense circuit;

a comparator having first and second input terminals and an output terminal, the first input terminal of the comparator coupled to the output terminal of the amplifier and the second input terminal of the comparator serving as the third input terminal of the sense circuit;

a second logic gate having first and second input terminals and an output terminal, the first input terminal of the second logic gate coupled to the output terminal of the comparator; and

a pulse generator having an input terminal and an output terminal, the input terminal of the pulse generator coupled to the output terminal of the second logic gate.

3. The bootstrap circuit of claim 2, wherein the second input terminal of the comparator is coupled for receiving a reference voltage.

4. The bootstrap circuit of claim 3, further including a third logic gate having an input terminal and an output terminal, the input terminal of the third logic gate coupled to the output terminal of the pulse generator and the output terminal of the third logic gate coupled to the first input terminal of the first logic gate.

5. The bootstrap circuit of claim 2, wherein the pulse generator comprises a one shot.

6. The bootstrap circuit of claim 1, further including a second logic gate having an input terminal and an output terminal, the input terminal of the second logic gate coupled to the output terminal of the sense circuit and the output terminal of the second logic gate coupled to the first input terminal of the first logic gate.

7. A converter comprising:

first and second transistors, each transistor of the first and second transistors having a control electrode and first and second current carrying electrodes, wherein the second current carrying electrode of the first transistor is directly coupled to the first current carrying electrode of the second transistor to form a node;

a bootstrap circuit comprising;

a sense circuit having first, second, third, and fourth input terminals and an output terminal, the first input terminal coupled to the node, the output terminal of the sense circuit coupled to the control terminal of the first transistor; and

a first logic gate having first and second input terminals and an output terminal, the first input terminal of the first logic gate coupled to the output terminal of the sense circuit, the output terminal of the first logic gate coupled to the control terminal of the second transistor; and

an energy storage element having a first terminal and a second terminal, the first terminal of the energy storage element directly connected to the first input terminal of the sense circuit and the second terminal of the energy storage element directly connected to the second input terminal of the sense circuit.

8. The converter of claim 7, wherein the sense circuit comprises:

a sense amplifier having first and second input terminals and an output terminal;

a comparator having first and second input terminals and an output terminal, the first input terminal of the comparator coupled to the output terminal of the sense amplifier;

a second logic gate having first and second input terminals and an output terminal, the first input terminal of the second logic circuit coupled to the output terminal of the comparator; and

a one shot having an input terminal and an output terminal, the input terminal coupled to the output terminal of the second logic gate and the output terminal of the one shot serving as the output terminal of the sense circuit.

9. A converter comprising:

first and second transistors, each transistor of the first and second transistors having a control electrode and first and second current carrying electrodes, wherein the second current carrying electrode of the first transistor is coupled to the first current carrying electrode of the second transistor to form a first node; and

a bootstrap circuit comprising;

a sense circuit having first, second, third, and fourth input terminals and an output terminal, the first input terminal coupled to the node, wherein the sense circuit comprises;

a sense amplifier having first and second input terminals and an output terminal;

a comparator having first and second input terminals and an output terminal, the first input terminal of the comparator coupled to the output terminal of the sense amplifier;

a second logic gate having first and second input terminals and an output terminal, the first input terminal of the second logic circuit coupled to the output terminal of the comparator; and

a one shot having an input terminal and an output terminal, the input terminal coupled to the output terminal of the second logic gate and the output terminal of the one shot serving as the output terminal of the sense circuit; and

a first logic gate having first and second input terminals and an output terminal, the first input terminal of the first logic gate coupled to the output terminal of the sense circuit; and

an inverter coupled between the output terminal of the sense circuit and the first input terminal of the first logic gate.

10. The converter of claim 9, wherein the first logic gate and the second logic gate are AND gates.

11. The converter of claim 9, wherein the output terminal of the sense circuit is coupled to the control electrode of the second transistor.

12. The converter of claim 11, further including:

a third logic gate having a first input and a second input, the first input of the third logic gate coupled to the output of the sense circuit; and

an inverter having an input and an output, the input of the inverter coupled to the output of the third logic gate and the output of the inverter coupled to the control electrode of the third logic gate.

13. The converter of claim 12, wherein the third logic gate is an OR gate.

14. The converter of claim 9, further including a capacitor having first and second terminals, wherein the first terminal of the capacitor is coupled to the first input terminal of the sense circuit and the second terminal of the capacitor is coupled to the second input terminal of the sense circuit.

15. The converter of claim 14, wherein the output terminal of the first logic gate is coupled to the control electrode of the first transistor.

16. A method for operating a converter, comprising:

providing first and second transistors and an energy storage element, the first transistor having a control electrode and first and second current carrying electrodes and the second transistor having a control electrode and first and second current carrying electrodes, wherein the second current carrying electrode of the first transistor is directly coupled to the first current carrying electrode of the second transistor at a switching node, the energy storage element having a first terminal and a second terminal, the first terminal of the energy storage element directly connected to the switching node;

providing a bootstrap circuit comprising;

a sense circuit having first, second, third, and fourth input terminals and

an output terminal, the first input terminal of the sense circuit directly coupled to the switching node and to the first terminal of the energy storage element, the second terminal of the sense circuit connected to the second terminal of the energy storage element, and the output terminal of the sense circuit coupled to the control electrode of the first transistor; and

a first logic gate having first and second input terminals and an output terminal, the first input terminal of the first logic gate coupled to the output terminal of the sense circuit and the output terminal of the first logic gate coupled to the control electrode of the second transistor;

sensing a signal across the energy storage element to generate a sense signal, the signal across the energy storage element at the first and second input terminals of the sense circuit; and

in response to the sense signal being less than a reference level, turning on the second transistor and holding the first transistor in an off state, wherein a current flowing through the second transistor charges the energy storage element.

17. The method of claim 16, wherein sensing the signal across the energy storage element comprises sensing a voltage across a capacitor.

18. The method of claim 16, wherein turning on the second transistor includes turning the second transistor on for a predetermined amount of time.

19. The method of claim 16, wherein turning on the second transistor includes turning on the second transistor in response to a pulse width modulation signal.

20. The method of claim 16, further including turning on, the first transistor in response to the sense signal being greater than the reference level.