Semiconductor device and manufacturing method thereof

• US 9,142,648 B2
• Filed: 01/10/2014
• Issued: 09/22/2015
• Est. Priority Date: 05/21/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Nguyen, Thinh T
• Application Number:
  US14/152,182
• Publication Number:
  US 20140113408A1
• Time in Patent Office: 620 Days
• Field of Search: 438/104, 438/150, 438/158, 257/57, 257/43, 257/59
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02107 Forming insulating materials on a substrate
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02587 Structure
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/465 Chemical or electrical treatment, e.g. electrolytic etching to form insulating layers H01L21/469
• CPC Class Codes: H01L 21/469 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques encapsulating layers H01L21/56; After-treatment of these layers
• CPC Class Codes: H01L 21/4757 After-treatment
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Disclosed is a semiconductor device including an oxide semiconductor film. A first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 15 nm is formed over a gate insulating layer. First heat treatment is performed so that crystal growth from a surface of the first oxide semiconductor film to the inside thereof is caused, whereby a first crystal layer is formed. A second oxide semiconductor film with a thickness greater than that of the first oxide semiconductor film is formed over the first crystal layer. Second heat treatment is performed so that crystal growth from the first crystal layer to a surface of the second oxide semiconductor film is caused, whereby a second crystal layer is formed. Further, oxygen doping treatment is performed on the second crystal layer.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming a stacked oxide semiconductor film over the gate insulating layer, the stacked oxide semiconductor film comprising a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film;

performing oxygen doping treatment on the stacked oxide semiconductor film; and

forming a source electrode layer and a drain electrode layer over the stacked oxide semiconductor film,

wherein each of the first oxide semiconductor film and the second oxide semiconductor film contains indium,

wherein the first oxide semiconductor film includes crystals which are c-axis aligned perpendicularly to a surface of the first oxide semiconductor film, and

wherein the second oxide semiconductor film includes crystals which are c-axis aligned perpendicularly to a surface of the second oxide semiconductor film.

2. The method for manufacturing a semiconductor device according to claim 1, further comprising a step of performing halogen doping treatment on the gate insulating layer before forming the first oxide semiconductor film.

3. The method for manufacturing a semiconductor device according to claim 1, wherein a thickness of the second oxide semiconductor film is larger than a thickness of the first oxide semiconductor film.

4. The method for manufacturing a semiconductor device, according to claim 1, further comprising a step of forming an oxide film over and in contact with the source electrode layer, the drain electrode layer, and the second oxide semiconductor film.

5. The method for manufacturing a semiconductor device, according to claim 4, wherein the oxide film includes one or more elements selected from constituent metal element of the second oxide semiconductor film.

15. The method for manufacturing a semiconductor device according to claim 1,

wherein each of the first oxide semiconductor film and the second oxide semiconductor film is formed by sputtering while a temperature of the substrate is set to higher than or equal to 200°

C. and lower than or equal to 500°

C.

6. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming a stacked oxide semiconductor film over the gate insulating layer, the stacked oxide semiconductor film comprising a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film;

performing oxygen doping treatment on the stacked oxide semiconductor film;

performing a heat treatment on the stacked oxide semiconductor film; and

forming a source electrode layer and a drain electrode layer over the stacked oxide semiconductor film,

wherein each of the first oxide semiconductor film and the second oxide semiconductor film contains indium,

wherein the first oxide semiconductor film includes crystals which are c-axis aligned perpendicularly to a surface of the first oxide semiconductor film, and

wherein the second oxide semiconductor film includes crystals which are c-axis aligned perpendicularly to a surface of the second oxide semiconductor film.

7. The method for manufacturing a semiconductor device according to claim 6 further comprising a step of performing halogen doping treatment on the gate insulating layer before forming the first oxide semiconductor film.

8. The method for manufacturing a semiconductor device according to claim 6 wherein a thickness of the second oxide semiconductor film is larger than a thickness of the first oxide semiconductor film.

9. The method for manufacturing a semiconductor device according to claim 6 further comprising a step of forming an oxide film over and in contact with the source electrode layer, the drain electrode layer, and the second oxide semiconductor film.

10. The method for manufacturing a semiconductor device according to claim 9 wherein the oxide film includes one or more elements selected from constituent metal element of the second oxide semiconductor film.

16. The method for manufacturing a semiconductor device according to claim 6,

wherein each of the first oxide semiconductor film and the second oxide semiconductor film is formed by sputtering while a temperature of the substrate is set to higher than or equal to 200°

C. and lower than or equal to 500°

C.

11. A method for manufacturing a semiconductor device, comprising the steps of:

forming an insulating layer over a substrate;

forming a stacked oxide semiconductor film over the insulating layer, the stacked oxide semiconductor film comprising a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film;

performing oxygen doping treatment on the stacked oxide semiconductor film;

forming a source electrode layer and a drain electrode layer over the stacked oxide semiconductor film;

forming an oxide film over and in contact with the source electrode layer, the drain electrode layer, and the second oxide semiconductor film; and

forming an electrode over the oxide film,

wherein each of the first oxide semiconductor film and the second oxide semiconductor film contains indium,

wherein the first oxide semiconductor film includes crystals which are c-axis aligned perpendicularly to a surface of the first oxide semiconductor film, and

wherein the second oxide semiconductor film includes crystals which are c-axis aligned perpendicularly to a surface of the second oxide semiconductor film.

12. The method for manufacturing a semiconductor device according to claim 11, wherein a thickness of the second oxide semiconductor film is larger than a thickness of the first oxide semiconductor film.

13. The method for manufacturing a semiconductor device according to claim 11, wherein the oxide film includes one or more elements selected from constituent metal element of the second oxide semiconductor film.

14. The method for manufacturing a semiconductor device according to claim 11, further comprising a step of forming a gate electrode before forming the insulating layer.

17. The method for manufacturing a semiconductor device according to claim 11,

wherein each of the first oxide semiconductor film and the second oxide semiconductor film is formed by sputtering while a temperature of the substrate is set to higher than or equal to 200°

C. and lower than or equal to 500°

C.