High temperature gold-free wafer bonding for light emitting diodes

• US 9,142,743 B2
• Filed: 08/02/2011
• Issued: 09/22/2015
• Est. Priority Date: 08/02/2011
• Status: Active Grant

• Current Assignee: Seoul Semiconductor Co., Ltd.
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Chuang, Chih-Wei, Lin, Chao-Kun, Yang, Long, Hamaguchi, Norihito
• Primary Examiner(s): Such, Matthew W
• Assistant Examiner(s): Naraghi, Ali
• Application Number:
  US13/196,839
• Publication Number:
  US 20130032845A1
• Time in Patent Office: 1,512 Days
• Field of Search: 257 98-100
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/2612 Auxiliary members for layer connectors, e.g. spacers
• CPC Class Codes: H01L 2224/29118 Zinc [Zn] as principal constituent
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/1033 : Gallium nitride [GaN]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2933/0066 : relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/405 : Reflective materials
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

A vertical GaN-based LED is made by growing an epitaxial LED structure on a silicon wafer. A silver layer is added and annealed to withstand >450° C. temperatures. A barrier layer (e.g., Ni/Ti) is provided that is effective for five minutes at >450° C. at preventing bond metal from diffusing into the silver. The resulting device wafer structure is then wafer bonded to a carrier wafer structure using a high temperature bond metal (e.g., AlGe) that melts at >380° C. After wafer bonding, the silicon is removed, gold-free electrodes (e.g., Al) are added, and the structure is singulated. High temperature solder (e.g., ZnAl) that is compatible with the electrode metal is used for die attach. Die attach occurs at >380° C. for ten seconds without melting the bond metal or otherwise damaging the device. The entire LED contains no gold, and consequently is manufacturable in a high-volume gold-free semiconductor fabrication facility.

Claims

1. A method of manufacture comprising:

(a) wafer bonding a carrier wafer structure to a device wafer structure by melting a bond metal disposed between the carrier wafer structure and the device wafer structure, wherein the device wafer structure comprises a silicon substrate and an epitaxial Light Emitting Diode (LED) structure formed on the silicon substrate, wherein the epitaxial LED structure comprises an n-type layer, a p-type layer, and an active layer disposed between the n-type layer and the p-type layer, wherein the active layer comprises an amount of indium, wherein the carrier wafer structure comprises a carrier, wherein the bond metal layer includes substantially no gold and wherein the wafer bonding of (a) results in a wafer bonded structure;

(b) after (a) removing the silicon substrate from the wafer bonded structure;

(c) after (b) forming first and second electrodes, the first electrode being in contact with the n-type layer, the second electrode being in contact with the p-type layer; and

(d) singulating the wafer bonded structure thereby forming an LED device,

wherein the bond metal comprises aluminum and silicon.

2. The method of manufacture of claim 1, wherein the carrier is a silicon wafer.

3. The method of manufacture of claim 1, further comprising:

(e) prior to (a) providing a silver layer over the epitaxial LED structure of the device wafer structure; and

(f) after (e) and prior to (a) providing a barrier layer over the silver layer, wherein the barrier layer comprises an amount of nickel.

4. The method of manufacture of claim 1, further comprising:

(e) prior to (a) providing a silver layer over the epitaxial LED structure of the device wafer structure; and

(f) after (e) and prior to (a) annealing the silver layer onto the epitaxial LED structure at a temperature of at least approximately 400 degrees Celsius.

5. The method of manufacture of claim 1, wherein the LED device comprises substantially no gold.

6. The method of manufacture of claim 1, wherein the bond metal has a melting temperature, the method further comprising:

(e) soldering the LED device to a metal surface by melting an amount of solder between the LED device and the metal surface, wherein the solder has a melting temperature that is lower than the melting temperature of the bond metal.

7. The method of manufacture of claim 6, wherein the soldering of (e) results in an LED assembly, and wherein the LED assembly comprises substantially no gold.

8. The method of manufacture of claim 6, wherein the metal surface is a surface of a metal core Printed Circuit Board.

9. The method of manufacture of claim 1, wherein the wafer bonding of (a) is carried at a temperature of at least approximately 380 degrees Celsius.

10. A method of manufacture comprising:

(a) wafer bonding a carrier wafer structure to a device wafer structure by melting a bond metal disposed between the carrier wafer structure and the device wafer structure, wherein the device wafer structure comprises an epitaxial Light Emitting Diode (LED) structure, wherein the epitaxial LED structure comprises an n-type layer, a p-type layer, and an active layer disposed between the n-type layer and the p-type layer, wherein the active layer comprises an amount of indium, wherein the carrier wafer structure comprises a carrier, and wherein the bond metal comprises aluminum and germanium.

11. The method of manufacture of claim 10, wherein the device wafer structure includes a silicon substrate, and wherein the wafer bonding of (a) results in a wafer bonded structure, the method further comprising:

(b) after (a) removing the silicon substrate from the wafer bonded structure;

(c) after (b) forming first and second electrodes, the first electrode being in contact with the n-type layer, the second electrode being in contact with the p-type layer; and

(d) singulating the wafer bonded structure thereby forming an LED device.

12. A method of manufacture comprising:

(a) wafer bonding a carrier wafer structure to a device wafer structure by melting a bond metal disposed between the carrier wafer structure and the device wafer structure, wherein the device wafer structure comprises a silicon substrate and an epitaxial Light Emitting Diode (LED) structure formed on the silicon substrate, wherein the epitaxial LED structure comprises an n-type layer, a p-type layer, and an active layer disposed between the n-type layer and the p-type layer, wherein the active layer comprises an amount of indium, wherein the carrier wafer structure comprises a carrier, wherein the bond metal layer includes substantially no gold and wherein the wafer bonding of (a) results in a wafer bonded structure;

(b) after (a) removing the silicon substrate from the wafer bonded structure;

(c) after (b) forming first and second electrodes, the first electrode being in contact with the n-type layer, the second electrode being in contact with the p-type layer; and

(d) singulating the wafer bonded structure thereby forming an LED device,

wherein the bond metal comprises an aluminum sublayer and a germanium sublayer, wherein the aluminum sublayer at the time of the wafer bonding of (a) is a part of the device wafer structure, wherein the germanium sublayer at the time of the wafer bonding of (a) is a part of the carrier wafer structure, and wherein the aluminum sublayer and the germanium sublayer fuse together during the wafer bonding of (a).

13. The method of manufacture of claim 12, wherein the carrier is a silicon wafer.

14. The method of manufacture of claim 12, further comprising:

(e) prior to (a) providing a silver layer over the epitaxial LED structure of the device wafer structure; and

(f) after (e) and prior to (a) providing a barrier layer over the silver layer, wherein the barrier layer comprises an amount of nickel.

15. The method of manufacture of claim 12, further comprising:

(e) prior to (a) providing a silver layer over the epitaxial LED structure of the device wafer structure; and

(f) after (e) and prior to (a) annealing the silver layer onto the epitaxial LED structure at a temperature of at least approximately 400 degrees Celsius.

16. The method of manufacture of claim 12, wherein the LED device comprises substantially no gold.

17. The method of manufacture of claim 12, wherein the bond metal has a melting temperature, the method further comprising:

(e) soldering the LED device to a metal surface by melting an amount of solder between the LED device and the metal surface, wherein the solder has a melting temperature that is lower than the melting temperature of the bond metal.

18. The method of manufacture of claim 17, wherein the soldering of (e) results in an LED assembly, and wherein the LED assembly comprises substantially no gold.

19. The method of manufacture of claim 12, wherein the wafer bonding of (a) is carried at a temperature of at least approximately 380 degrees Celsius.

20. A method of manufacture comprising:

(a) wafer bonding a carrier wafer structure to a device wafer structure by melting a bond metal disposed between the carrier wafer structure and the device wafer structure, wherein the device wafer structure comprises a silicon substrate and an epitaxial Light Emitting Diode (LED) structure formed on the silicon substrate, wherein the epitaxial LED structure comprises an n-type layer, a p-type layer, and an active layer disposed between the n-type layer and the p-type layer, wherein the active layer comprises an amount of indium, wherein the carrier wafer structure comprises a carrier, wherein the bond metal layer includes substantially no gold, and wherein the wafer bonding of (a) results in a wafer bonded structure;

(b) after (a) removing the silicon substrate from the wafer bonded structure;

(c) after (b) forming first and second electrodes, the first electrode being in contact with the n-type layer, the second electrode being in contact with the p-type layer;

(d) singulating the wafer bonded structure thereby forming an LED device;

(e) attaching the LED device to a metal surface by melting an amount of solder, wherein the solder has a melting temperature, wherein the melting temperature of the solder is lower than a melting temperature of the bond metal,

wherein the bond metal comprises aluminum and germanium.

21. The method of manufacture of claim 20, wherein the solder comprises zinc and aluminum.

22. The method of manufacture of claim 20, wherein the LED device further comprises a barrier layer and a silver layer, wherein the barrier layer is disposed between the bond metal and the silver layer, and wherein the barrier layer comprises an amount of nickel.

23. The method of manufacture of claim 20, wherein the melting temperature of the bond metal is at least approximately 380 degrees Celsius.

24. The method of manufacture of claim 20, wherein the metal surface is a surface of a metal core Printed Circuit Board.

25. The method of manufacture of claim 20, wherein the LED device comprises substantially no gold.