Method and system for speed negotiation for twisted pair links using intelligent E-FIFO in fibre channel systems
First Claim
1. An apparatus residing in a fibre channel host device, the fibre channel host device communicatively coupled to another fibre channel host device over a twisted pair link, the apparatus comprising:
- a physical layer (PHY) circuit operable, in a slave mode of operation, to receive data transmitted over the twisted pair link from a master PHY circuit in the another fibre channel host device, the PHY circuit comprising;
a pulse amplitude modulation (PAM) encoder/decoder operable to convert the data transmitted over the twisted pair link to PAM symbols;
clock recovery logic operable to recover a derived clock from the received data, wherein the derived clock determines a transmission rate between the PHY circuit and the master PHY circuit for the data received from the master PHY circuit; and
a first elastic buffer operable to store the data received from the master PHY circuit via the PAM encoder/decoder and a second elastic buffer operable to store data received from the fibre channel host device for outgoing transmission to the master PHY circuit over the twisted pair link via the PAM encoder/decoder, wherein the transmission rate between the PAM encoder/decoder and the first elastic buffer is the same as the transmission rate between the PAM encoder/decoder and the second elastic buffer, while the transmission rate for data being transmitted from the PHY circuit and the fibre channel host device is different than the transmission rate being transmitted from the fibre channel host device to the PHY circuit.
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Accused Products
Abstract
Systems, apparatuses and methods are disclosed for using elastic buffers in fiber channel systems over twisted pair links. One such system includes a fiber channel host device and another fiber channel host device communicatively coupled to the fiber channel device over a twisted pair link. The system also includes a slave physical layer (PHY) circuit residing in the fiber channel host device and a master PHY circuit residing in the another fiber channel host device. The master PHY circuit is operable to transmit, using a reference clock, data from a transmit elastic buffer. The slave PHY circuit is operable to receive the data transmitted by the master PHY circuit and to store the received data using a derived clock recovered from the received data.
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Citations
15 Claims
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1. An apparatus residing in a fibre channel host device, the fibre channel host device communicatively coupled to another fibre channel host device over a twisted pair link, the apparatus comprising:
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a physical layer (PHY) circuit operable, in a slave mode of operation, to receive data transmitted over the twisted pair link from a master PHY circuit in the another fibre channel host device, the PHY circuit comprising; a pulse amplitude modulation (PAM) encoder/decoder operable to convert the data transmitted over the twisted pair link to PAM symbols; clock recovery logic operable to recover a derived clock from the received data, wherein the derived clock determines a transmission rate between the PHY circuit and the master PHY circuit for the data received from the master PHY circuit; and a first elastic buffer operable to store the data received from the master PHY circuit via the PAM encoder/decoder and a second elastic buffer operable to store data received from the fibre channel host device for outgoing transmission to the master PHY circuit over the twisted pair link via the PAM encoder/decoder, wherein the transmission rate between the PAM encoder/decoder and the first elastic buffer is the same as the transmission rate between the PAM encoder/decoder and the second elastic buffer, while the transmission rate for data being transmitted from the PHY circuit and the fibre channel host device is different than the transmission rate being transmitted from the fibre channel host device to the PHY circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. In a fibre channel host device communicatively coupled to another fibre channel host device over twisted pair, a method comprising:
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receiving, by a physical layer (PHY) circuit, data transmitted from a master PHY circuit, the master PHY circuit residing in the another fibre channel host device; converting, by a pulse amplitude modulation (PAM) encoder/decoder, the data transmitted over the twisted pair link to PAM symbols recovering a derived clock from the received data, wherein the derived clock determines a transmission at which the received data is transmitted from the master PHY circuit; and storing, in a first elastic buffer, the data received from the master PHY circuit via the PAM encoder/decoder and storing, in a second elastic buffer, data received from the fibre channel host device for outgoing transmission to the master PHY circuit over the twisted pair link via the PAM encoder/decoder, wherein the transmission rate between the PAM encoder/decoder and the first elastic buffer is the same as the transmission rate between the PAM encoder/decoder and the second elastic buffer, while the transmission rate for data being transmitted from the PHY circuit and the fibre channel host device is different than the transmission rate being transmitted from the fibre channel host device to the PHY circuit. - View Dependent Claims (10, 11, 12, 13)
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14. A fibre channel system comprising:
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a fibre channel host device; another fibre channel host device communicatively coupled to the fibre channel device over a twisted pair link; a slave physical layer (PHY) circuit residing in the fibre channel host device; and a master PHY circuit residing in the another fibre channel host device, the master PHY circuit operable to transmit, using a reference clock, data from a transmit elastic buffer over the twisted pair link to the slave PHY circuit, and the slave PHY circuit including; a pulse amplitude modulation (PAM) encoder/decoder operable to convert the data transmitted over the twisted pair link to PAM symbols; clock recovery logic operable to recover a derived clock from the received data, wherein the derived clock determines a transmission rate between the PHY circuit and the master PHY circuit for the data received from the master PHY circuit; and a first elastic buffer operable to store the data received from the master PHY circuit via the PAM encoder/decoder and a second elastic buffer operable to store data received from the fibre channel host device for outgoing transmission to the master PHY circuit over the twisted pair link via the PAM encoder/decoder, wherein the transmission rate between the PAM encoder/decoder and the first elastic buffer is the same as the transmission rate between the PAM encoder/decoder and the second elastic buffer, while the transmission rate for data being transmitted from the PHY circuit and the fibre channel host device is different than the transmission rate being transmitted from the fibre channel host device to the PHY circuit. - View Dependent Claims (15)
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Specification