Timing channel circuitry for creating pulses in an implantable stimulator device
First Claim
1. An implantable stimulator device, comprising:
- a memory for storing pulse parameters defining a plurality of pulse phases for a periodic pulse, wherein the pulse parameters for each of the plurality of pulse phases are stored in at least one address in the memory,a first register for receiving first data from a first address of the at least one address in the memory for each of the pulse phases;
a second register for receiving second data from other addresses if present of the at least one address in the memory for each of the pulse phases;
control circuitry for receiving the first data, wherein the first data comprises the duration of each of the plurality of pulse phases; and
stimulation circuitry for receiving the second data, wherein the second data configures the stimulation circuitry to form the pulse phases at electrodes for stimulating a patient'"'"'s tissue.
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Abstract
Timing channel circuitry for controlling stimulation circuitry in an implantable stimulator is disclosed. The timing channel circuitry comprises a addressable memory. Data for the various phases of a desired pulse are stored in the memory using different numbers of words, including a command indicative of the number of words in the phase, a next address for the next phase stored in the memory, and a pulse width or duration of the current phase, control data for the stimulation circuitry, pulse amplitude, and electrode data. The command data is used to address through the words in the current phase via the address bus, which words are sent to a control register for the stimulation circuitry. After the duration of the pulse width for the current phase has passed, the stored next address is used to access the data for the next phase stored in the memory.
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Citations
20 Claims
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1. An implantable stimulator device, comprising:
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a memory for storing pulse parameters defining a plurality of pulse phases for a periodic pulse, wherein the pulse parameters for each of the plurality of pulse phases are stored in at least one address in the memory, a first register for receiving first data from a first address of the at least one address in the memory for each of the pulse phases; a second register for receiving second data from other addresses if present of the at least one address in the memory for each of the pulse phases; control circuitry for receiving the first data, wherein the first data comprises the duration of each of the plurality of pulse phases; and stimulation circuitry for receiving the second data, wherein the second data configures the stimulation circuitry to form the pulse phases at electrodes for stimulating a patient'"'"'s tissue. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for configuring stimulation circuitry in an implantable stimulator device, the stimulation circuitry for forming pulse phases at electrodes for stimulating a patient'"'"'s tissue, the method comprising:
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(a) reading data out of a memory for a first pulse phase, the data indicating a number of addresses in which pulse phase parameters are stored in the memory for the first pulse phase and a duration of the first pulse phase; (b) if the data indicates more than one address for the first pulse phase, sequentially reading the pulse phase parameters out of the number of addresses in the memory, and providing the pulse phase parameters to the stimulation circuitry to form the first pulse phase at the electrodes for the duration; (c) if the first data does not indicate more than one address for the first pulse phase, waiting for the duration; (d) after the duration, repeating steps (a)-(d) for a subsequent pulse phase. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification