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Selective die electrical insulation by additive process

  • US 9,147,583 B2
  • Filed: 10/27/2010
  • Issued: 09/29/2015
  • Est. Priority Date: 10/27/2009
  • Status: Active Grant
First Claim
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1. A method for forming an interconnected stacked die assembly, comprising:

  • providing semiconductor die having electrical interconnect pads arranged in an interconnect margin adjacent an interconnect die edge;

    stacking a plurality of said die such that a die edge at the interconnect margin of a first die is offset in relation to a die edge at the interconnect margin of a second die, and a plurality of the interconnect pads of successive die in the stack are arranged in a column;

    and then selectively depositing a dielectric material via a nozzle to provide electrical insulation on less than all of the interconnect pads in the column such that at least some of the interconnect pads in the column are free from being electrically insulated without requiring the deposited dielectric material to be removed and the at least some interconnect pads are available for electrical connection while other interconnect pads in the column are electrically insulated, the nozzle being controlled so that the dielectric material flows from the nozzle during intervals when a flow axis of the nozzle is directed at a selected interconnect pad in the column and does not flow from the nozzle during intervals when the flow axis is directed at an unselected interconnect pad in the column.

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