System for reducing dynamic power consumption of wakeup source

• US 9,152,207 B2
• Filed: 06/21/2012
• Issued: 10/06/2015
• Est. Priority Date: 06/21/2012
• Status: Expired due to Fees

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Srivastava, Gur Prasad, Baweja, Parampreet Singh, Gupta, Rohit
• Primary Examiner(s): Abbaszadeh, Jaweed A
• Assistant Examiner(s): Chen, Xuxing
• Application Number:
  US13/530,095
• Publication Number:
  US 20130346775A1
• Time in Patent Office: 1,202 Days
• Field of Search: 713/323
• US Class Current: 1/1
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/32 Means for saving power
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices
• CPC Class Codes: G06F 1/3237 by disabling clock generation or distribution
• CPC Class Codes: G06F 1/3278 Power saving in modem or I/O interface
• CPC Class Codes: G06F 2213/0038 System on Chip
• CPC Class Codes: H04L 63/0414 during transmission, i.e. party's identity is protected against eavesdropping, e.g. by using temporary identifiers, but is known to the other party or parties involved in the communication
• CPC Class Codes: H04L 63/08 for authentication of entities cryptographic mechanisms or cryptographic arrangements for entity authentication H04L9/32
• CPC Class Codes: H04L 63/1416 Event detection, e.g. attack signature detection
• CPC Class Codes: H04W 52/0225 using monitoring of external events, e.g. the presence of a signal
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A system for reducing dynamic power consumption of a wakeup source includes a receiver interface coupled to the wakeup source. A data packet, received by the receiver interface, transmits the data packet to the wakeup source. The wakeup source processes the data packet to identify a predetermined code for initiating a wakeup sequence. The wakeup source is put into a deep sleep mode if it is idle for a predetermined time period.

Claims

1. A system for receiving a data packet from a source device and transmitting the data packet to a destination device, comprising:

an input/output (I/O) pad for receiving the data packet from the source device;

a wakeup source, coupled to the I/O pad, for processing the data packet, wherein the wakeup source initiates a wakeup sequence when the data packet includes a predetermined code, and transmits the data packet to the destination device;

clock gating logic, coupled to the wakeup source, for switching on the wakeup source when the I/O pad receives the data packet and switching off the wakeup source when the I/O pad is idle for a first predetermined time period; and

at least one buffer circuit, coupled between the I/O pad and the wakeup source, for delaying transmission of the data packet to the wakeup source by a second predetermined time period, wherein the wakeup source is switched on within the second predetermined time period.

2. The system of claim 1, wherein the source device is a data packet originator and the destination device is an external memory.

3. The system of claim 1, wherein the source device is at least one of an Ethernet transmitter and Universal Serial Bus (USB) device.

4. The system of claim 1, wherein the destination device is at least one of a double data rate (DDR) memory, FLASH memory, and internal synchronous random access memory (SRAM).

5. The system of claim 1, wherein the wakeup source is at least one of Ethernet controller and USB controller that receives the data packet from the source device.

6. The system of claim 5, wherein the wakeup sequence switches on a data path to the destination device.

7. The system of claim 1, wherein the clock gating logic enables a clock signal provided to the wakeup source for switching on the wakeup source.

8. The system of claim 7, wherein the clock gating logic gates the clock signal provided to the wakeup source for switching off the wakeup source.

9. A method for reducing dynamic power consumption of a wakeup source in a deep sleep mode, wherein the wakeup source processes a data packet during transmission of the data packet from a source device to a destination device, the method comprising:

receiving the data packet at an input/output (I/O) pad coupled to the wakeup source;

enabling a dock signal provided to the wakeup source when the data packet is received at the I/O pad;

delaying the transmission of the data packet to the wakeup source by a second predetermined time period;

switching on the wakeup source within the second predetermined time period;

processing the data packet by the wakeup source to detect a predetermined code embedded in the data packet; and

gating the dock signal when the I/O pad is idle for a first predetermined time period.