Method for manufacturing semiconductor device

• US 9,153,436 B2
• Filed: 10/15/2013
• Issued: 10/06/2015
• Est. Priority Date: 10/17/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Suzawa, Hideomi, Sasagawa, Shinya, Tanaka, Tetsuhiro
• Primary Examiner(s): Feeney, Brett
• Assistant Examiner(s): Chin, James
• Application Number:
  US14/054,162
• Publication Number:
  US 20140106504A1
• Time in Patent Office: 721 Days
• Field of Search: 438/104, 438/151, 438/482, 257/43, 257/40, 257/66
• US Class Current: 1/1
• CPC Class Codes: C23C 14/086 of zinc, germanium, cadmium, indium, tin, thallium or bismuth
• CPC Class Codes: C23C 14/3414 Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/02617 Deposition types
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/47576 Doping the layer
• CPC Class Codes: H01L 21/47635 After-treatment of these layers
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/26 including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24 , e.g. alloys
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

In a semiconductor device in which a channel formation region is included in an oxide semiconductor layer, an oxide insulating film below and in contact with the oxide semiconductor layer and a gate insulating film over and in contact with the oxide semiconductor layer are used to supply oxygen of the gate insulating film, which is introduced by an ion implantation method, to the oxide semiconductor layer.

Claims

1. A method for manufacturing a semiconductor device, including the steps of:

forming an oxide semiconductor layer over an oxide insulating film;

forming a first source electrode layer and a first drain electrode layer in contact with the oxide semiconductor layer by a first etching;

forming a conductive film over the first source electrode layer and the first drain electrode layer;

forming a resist mask over the conductive film by performing electron beam exposure;

forming a second source electrode layer and a second drain electrode layer covering the first source electrode layer and the first drain electrode layer, respectively, and being in contact with the oxide semiconductor layer by a second etching that etches the conductive film using the resist mask;

forming a gate insulating film over the oxide insulating film, the oxide semiconductor layer, the second source electrode layer, and the second drain electrode layer;

introducing oxygen into the gate insulating film; and

supplying the oxygen of the gate insulating film to the oxide semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the introduction of oxygen into the gate insulating film is performed by an ion implantation method.

3. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of:

forming a gate electrode over the gate insulating film before oxygen is introduced into the gate insulating film.

4. The method for manufacturing a semiconductor device according to claim 1, further comprising the steps of:

forming a gate electrode over the gate insulating film before oxygen is introduced into the gate insulating film; and

forming a protective insulating film over the gate electrode.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the first source electrode layer and the first drain electrode layer comprise at least one material selected from Al, Cr, Cu, Ta, Ti, Mo, and W.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the second source electrode layer and the second drain electrode layer comprise at least one material selected from tantalum nitride, titanium nitride, and ruthenium.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the second source electrode layer and the second drain electrode layer are in contact with the oxide insulating film.

8. A method for manufacturing a semiconductor device, including the steps of:

forming an oxide semiconductor layer over an oxide insulating film;

forming a first source electrode layer and a first drain electrode layer in contact with the oxide semiconductor layer by a first etching;

forming a conductive film over the first source electrode layer and the first drain electrode layer;

forming a resist mask over the conductive film by performing electron beam exposure;

forming a second source electrode layer and a second drain electrode layer covering the first source electrode layer and the first drain electrode layer, respectively, and being in contact with the oxide semiconductor layer by a second etching that etches the conductive film using the resist mask;

forming a gate insulating film over the oxide insulating film, the oxide semiconductor layer, the second source electrode layer, and the second drain electrode layer;

introducing oxygen into the gate insulating film; and

supplying the oxygen of the gate insulating film and the oxide insulating film to the oxide semiconductor layer.

9. The method for manufacturing a semiconductor device according to claim 8, wherein the introduction of oxygen into the gate insulating film is performed by an ion implantation method.

10. The method for manufacturing a semiconductor device according to claim 8, further comprising the step of:

forming a gate electrode over the gate insulating film before oxygen is introduced into the gate insulating film.

11. The method for manufacturing a semiconductor device according to claim 8, further comprising the steps of:

forming a gate electrode over the gate insulating film before oxygen is introduced into the gate insulating film; and

forming a protective insulating film over the gate electrode.

12. The method for manufacturing a semiconductor device according to claim 8, wherein the first source electrode layer and the first drain electrode layer comprise at least one material selected from Al, Cr, Cu, Ta, Ti, Mo, and W.

13. The method for manufacturing a semiconductor device according to claim 8, wherein the second source electrode layer and the second drain electrode layer comprise at least one material selected from tantalum nitride, titanium nitride, and ruthenium.

14. The method for manufacturing a semiconductor device according to claim 8, wherein the second source electrode layer and the second drain electrode layer are in contact with the oxide insulating film.