Power FET with a resonant transistor gate

• US 9,153,532 B2
• Filed: 07/07/2014
• Issued: 10/06/2015
• Est. Priority Date: 08/23/2010
• Status: Active Grant

• Current Assignee: L. Pierre De Rochemont
• Original Assignee: L. Pierre De Rochemont
• Inventors: de Rochemont, L. Pierre
• Primary Examiner(s): MENZ, LAURA MARY
• Application Number:
  US14/325,129
• Publication Number:
  US 20150097221A1
• Time in Patent Office: 456 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: H01L 2223/6627 Waveguides, e.g. microstrip line, strip line, coplanar line
• CPC Class Codes: H01L 2223/6661 for passive devices
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/5228 Resistive arrangements or effects of, or between, wiring layers other resistive arrangements H01L23/647
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/64 Impedance arrangements
• CPC Class Codes: H01L 23/642 Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/43 characterised by the materials of which they are formed
• CPC Class Codes: H01L 29/435 : Resistive materials for field effect devices, e.g. resistive gate for MOSFET or MESFET
• CPC Class Codes: H01L 29/7395 : Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/78 : with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7803 : structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7831 : with multiple gate structure FinFETs or MuGFETs H01L29/7855, thin film transistors H01L29/78645
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor FET provides a resonant gate and source and drain electrodes, wherein the resonant gate is electromagnetically resonant at one or more predetermined frequencies.

Claims

1. A serpentine resonant transmission line formed on or in a substrate, comprising:

an electrically conducting path folded to induce electromagnetic coupling between adjacent conducting line segments that form;

capacitive loads along coupled conducting line segments in which the instantaneous currents within a portion of the coupled conducting line segment is oriented anti-parallel to the instantaneous current vectors within an adjacent conducting line segment, and,

inductive loads along other coupled conducting line segments in which the instantaneous currents within a portion of the coupled conducting line segment is oriented in parallel to the instantaneous current vectors within an adjacent conducting line segment;

and, ceramic dielectric material inserted between the coupled line segments to control reactive loading along the serpentine transmission line structure,

wherein the capacitive and inductive reactive loads distributed along the folded conducting paths are used to tune the resonant frequency or frequencies of the serpentine resonant transmission line.

2. The serpentine resonant transmission line of claim 1 that is terminated with a resistive element.

3. The serpentine resonant transmission line of claim 1 formed on a semiconducting substrate.

4. A serpentine resonant transmission line of claim 3 that further comprises a linear field effect transistor gate segment to form a resonant gate transistor having a serpentine resonant gate electrode.

5. The serpentine resonant gate electrode of claim 4 that further comprises a plurality of gate segments to form primary gate and additional gate segments along the serpentine path of the gate electrode.

6. The serpentine gate electrode of claim 5 further comprising a major branching point that splits off additional gate segments to extend the serpentine gate electrode along a different path from the primary gate segment.

7. The serpentine gate electrode of claim 6 having one or more additional branching points that split off additional gate segments from the additional gate segments split off from the major branching point.

8. The serpentine resonant gate electrode of claim 4 that is terminated with a resistive element.

9. The serpentine resonant gate electrode of claim 5 that is terminated with a resistive element.

10. The serpentine transmission line of claim 1 that comprises linear and/or arcuate line segments.

11. The serpentine resonant gate electrode of claim 4 that comprises linear and/or arcuate gate segments.

12. The resonant transmission line of claim 1 wherein the transmission line is designed to form an RLC circuit.

13. The RLC circuit of claim 12 which further comprises inductive and capacitive loads configured in series and/or parallel connection.

14. The RLC circuit of claim 13 that is terminated with a resistive element.

15. The serpentine resonant gate electrode of claim 4, wherein the gate electrode is designed to form an RLC circuit.

16. The RLC circuit in claim 15 further comprising inductive and capacitive loads configured in series and/or parallel connection.

17. The RLC circuit in claim 16 that is terminated with a resistive element.