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Method of wire bonding over active area of a semiconductor circuit

  • US 9,153,555 B2
  • Filed: 02/25/2007
  • Issued: 10/06/2015
  • Est. Priority Date: 10/15/2002
  • Status: Expired due to Term
First Claim
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1. A circuit component comprising:

  • a semiconductor substrate;

    an active device in said semiconductor substrate;

    a first dielectric layer having a first surface directly coupled to said semiconductor substrate and said active device;

    a first interconnect conductive layer on said first dielectric layer;

    a second dielectric layer having a first surface on said first interconnect conductive layer and on a second surface of said first dielectric layer opposite said first surface of said first dielectric layer, said second dielectric layer having a second surface opposite said first surface;

    a second interconnect conductive layer having first and second conductive interconnects each having a first surface and a second surface opposite said first surface, said second surface of each of said first and second conductive interconnects on said second surface of said second dielectric layer;

    a passivation layer on sidewalls and said first surface of each of said first and second conductive interconnects of said second interconnect conductive layer and on the second surface of said second dielectric layer, wherein a first opening in said passivation layer and a second opening in said passivation layer expose a first contact point and a second contact point, respectively, of said first conductive interconnect and said second conductive interconnect of said second interconnect conductive layer, and wherein said passivation layer comprises a nitride;

    a polymer layer on said passivation layer, wherein said polymer layer has a thickness that is significantly greater than a thickness of said passivation layer, and wherein an opening with sloped sidewalls is provided in said polymer layer to expose said first contact point and a sidewall of said passivation layer and a portion of said passivation layer on said surface of said second interconnect conductive layer;

    a conductive pad on said polymer layer and said first contact point, wherein said conductive pad is coupled to said first contact point through said opening in said polymer layer and said first opening in said passivation layer, wherein said conductive pad comprises a titanium-containing layer on said first contact point, a gold seed layer on said titanium-containing layer, and an electroplated gold layer, a portion of said polymer within an enclosure defined between sloped sidewalls of said conductive pad and a portion of said passivation layer between said first and second conductive interconnects; and

    a wirebond bonded to said conductive pad, wherein a contact between the wirebond and the conductive pad is aligned with said first contact point.

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