Thin film transistor array substrate, organic light emitting display device comprising the same, and method of manufacturing the thin film transistor array substrate

• US 9,153,605 B2
• Filed: 06/28/2012
• Issued: 10/06/2015
• Est. Priority Date: 11/30/2011
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kim, Dae-Woo, Park, Jong-Hyun
• Primary Examiner(s): Lee, Eugene
• Assistant Examiner(s): Jiang, Fang-Xing
• Application Number:
  US13/535,963
• Publication Number:
  US 20130134424A1
• Time in Patent Office: 1,195 Days
• Field of Search: 257/59, 257/99, 257/71, 257/72
• US Class Current: 1/1
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals

Abstract

A thin film transistor array substrate may include a thin film transistor including an active layer, a gate electrode, source and drain electrodes, a first insulation layer arranged between the active layer and the gate electrode, and a second insulation layer arranged between the gate electrode and the source and drain electrodes, a pixel electrode arranged on the first insulation layer and comprising the same material as the gate electrode, a capacitor comprising a first electrode arranged on the same layer as the active layer and a second electrode arranged on the same layer as the gate electrode, a pad electrode arranged on the second insulation layer and comprising the same material as the source and drain electrodes, a protection layer formed on the pad electrode, and a third insulation layer formed on the protection layer and exposing the pixel electrode.

Claims

1. A thin film transistor array substrate, comprising:

a capacitor comprising a first electrode and a second electrode;

a thin film transistor comprising

an active layer, a gate electrode, and source and drain electrodes,

a first insulation layer arranged between the active layer and the gate electrode, and

a second insulation layer arranged between the gate electrode and the source and drain electrodes;

a pixel electrode arranged on the first insulation layer and comprising a same material as the gate electrode;

a pad electrode arranged on the second insulation layer and comprising a same material as the source and drain electrodes;

a protection layer formed on the pad electrode, the protection layer and the pad electrode are formed from different layers; and

a third insulation layer formed on a portion of the protection layer and exposing another portion of the protection layer and the pixel electrode;

the first electrode of the capacitor and the active layer of the thin film transistor are formed from same layer,

the second electrode of the capacitor and the gate electrode of the thin film transistor are formed from same layer,

the pad electrode being spaced apart from and not overlapping the pixel electrode, the electrodes of the capacitor and the thin film transistor.

2. The thin film transistor array substrate of claim 1, the active layer comprises a semiconductor material doped with ion impurities.

3. The thin film transistor array substrate of claim 1, the pixel electrode comprises transparent conductive oxide.

4. The thin film transistor array substrate of claim 3, the transparent conductive oxide comprises at least one selected from a group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

5. The thin film transistor array substrate of claim 1, the first electrode comprises a semiconductor material doped with ion impurities.

6. The thin film transistor array substrate of claim 1, a gap is formed between an end portion of the pixel electrode and an end portion of the second insulation layer.

7. The thin film transistor array substrate of claim 1, an end portion of the pixel electrode and an end portion of the third insulation layer overlapped each other.

8. The thin film transistor array substrate of claim 1, a gap is formed between an end portion of the second electrode and an end portion of the second insulation layer.

9. The thin film transistor array substrate of claim 8, the third insulation layer contacts the first insulation layer in the gap.

10. The thin film transistor array substrate of claim 1, the protection layer is further formed on the source electrode and the drain electrode.

11. The thin film transistor array substrate of claim 1, the pad electrode comprises a plurality of metal layers having different electron mobility.

12. The thin film transistor array substrate of claim 11, the plurality of metal layers comprise a layer including molybdenum (Mo) and a layer including aluminum (Al).

13. The thin film transistor array substrate of claim 1, the protection layer comprises metal oxide or transparent conductive oxide.

14. The thin film transistor array substrate of claim 13, the transparent conductive oxide comprises at least one selected from a group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

15. The thin film transistor array substrate of claim 1, further comprised of a gap formed between an end portion of the pad electrode and an end portion of the protection layer.

16. The thin film transistor array substrate of claim 15, further comprised of the third insulation layer directly contacting an upper surface of the pad electrode in the gap.

17. The thin film transistor array substrate of claim 1, the gate electrode comprises a first layer including transparent conductive oxide and a second layer including metal.

18. The thin film transistor array substrate of claim 1, the gate electrode and the source and drain electrodes comprise the same material.

19. An organic light emitting display device, comprising:

a capacitor comprising a first electrode and a second electrode;

a thin film transistor comprising

an active layer, a gate electrode, and source and drain electrodes,

a first insulation layer arranged between the active layer and the gate electrode, and

a second insulation layer arranged between the gate electrode and the source and drain electrodes;

a pixel electrode arranged on the first insulation layer and comprising a same material as the gate electrode;

a pad electrode positioned to receive an image signal from a source external to the transistor, arranged on the second insulation layer and comprising the same material as the source and drain electrodes;

a protection layer formed on the pad electrode, the protection layer and the pad electrode are formed from different layers;

a third insulation layer formed on a portion of the protection layer and exposing another portion of the protection layer and the pixel electrode;

an organic light emitting layer arranged on the pixel electrode; and

an opposed electrode arranged on the organic light emitting layer;

the first electrode of the capacitor and the active layer of the thin film transistor are formed from same layer,

the second electrode of the capacitor and the gate electrode of the thin film transistor are formed from same layer, and

the pad electrode being spaced apart from and not overlapping the pixel electrode, the electrodes of the capacitor and the thin film transistor.

20. The organic light emitting display device of claim 19, the opposed electrode is a reflection electrode for reflecting light irradiated from the organic light emitting layer.