Insulated gate bipolar transistor

• US 9,153,676 B2
• Filed: 01/14/2014
• Issued: 10/06/2015
• Est. Priority Date: 07/14/2011
• Status: Active Grant

• Current Assignee: Hitachi Energy Limited (Hitachi, Ltd.)
• Original Assignee: ABB Technology AG (ABB Limited)
• Inventors: Rahimo, Munaf, Andenna, Maxi, Corvasce, Chiara, Kopta, Arnost
• Primary Examiner(s): FOURSON III, GEORGE R
• Application Number:
  US14/154,736
• Publication Number:
  US 20140124830A1
• Time in Patent Office: 630 Days
• Field of Search: 257/592, 438/138, 438/350, 438/370
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66325 controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

An IGBT has layers between emitter and collector sides, including a drift layer, a base layer electrically contacting an emitter electrode and completely separated from the drift layer, first and second source regions arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and first and second trench gate electrodes. The first trench gate electrodes are separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel is formable between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrodes. An enhancement layer separates the base layer from the drift layer. The second trench gate electrode is separated from the base layer, the enhancement layer and the drift layer by a third insulating layer.

Claims

1. An insulated gated bipolar transistor having layers between an emitter electrode on an emitter side and a collector electrode on a collector side opposite to the emitter side, the insulated gated bipolar transistor comprising:

a lowly doped drift layer of a first conductivity type;

a collector layer of a second conductivity type different than the first conductivity type, the collector layer being arranged between the drift layer and the collector electrode and electrically contacting the collector electrode;

a base layer of the second conductivity type arranged between the drift layer and the emitter electrode, the base layer electrically contacting the emitter electrode and being completely separated from the drift layer,

first and second source regions of the first conductivity type arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, the first and second source regions having a higher doping concentration than the drift layer;

at least two first trench gate electrodes arranged lateral to the base layer and extending deeper into the drift layer than the base layer, the at least two first trench gate electrodes being separated from the base layer, the first source region and the drift layer by a first insulating layer, wherein a first channel is formable from the emitter electrode, the first source region, the base layer and the drift layer between two of the first trench gate electrodes, the first source region being arranged between two of the first trench gate electrodes;

a second insulating layer arranged on the emitter side on top of the first trench gate electrodes;

an enhancement layer of the first conductivity type arranged between the base layer and the drift layer, the enhancement layer separating the base layer from the drift layer at least in a plane parallel to the emitter side and having a higher doping concentration than the drift layer;

a gate electrode including a second trench gate electrode and an electrically conducting layer, both of which are electrically connected to the emitter electrode, the second trench gate electrode being arranged lateral to the base layer and extending deeper into the drift layer than the base layer, the second trench gate electrode being separated from the base layer, the enhancement layer and the drift layer by a third insulating layer, wherein a second channel is formable from the emitter electrode, the second source region, the base layer and the drift layer between one of the first trench gate electrodes and the second trench gate electrode, the second source region being arranged between one of the first trench gate electrodes and the second trench gate electrode,

wherein the electrically conductive layer covers and laterally extends outside the second trench gate electrode at least to a region above the base layer,

wherein the electrically conductive layer is separated from the base layer by a fourth electrically insulating layer,

wherein the electrically conductive layer contacts the second trench gate electrode, and

wherein the insulated gated bipolar transistor comprises a fifth insulating layer arranged on the emitter side on top of the electrically conductive layer, the fifth insulating layer having a recess such that the electrically conducting layer electrically contacts the emitter electrode.

2. The insulated gated bipolar transistor according to claim 1, wherein at least one of the first trench gate electrodes extends to the same depth within the drift layer as the second trench gate electrode.

3. The insulated gated bipolar transistor according to claim 1, comprising:

a first region of the first conductivity type arranged on the collector side laterally to the collector layer, the first region having a higher doping concentration than the drift layer.

4. The insulated gated bipolar transistor according to claim 1, wherein the electrically conductive layer is made of the same material as the second trench gate electrode.

5. The insulated gated bipolar transistor according to claim 1, comprising:

a bar of the second conductivity type having a higher doping concentration than the base layer, the bar being arranged at the emitter side in a plane parallel to the emitter side and perpendicular to a direction in which the first source regions attach to the first trench gate electrode and at which the bar the first source region, the base layer, the first gate electrodes and the second trench gate electrode terminate.

6. The insulated gated bipolar transistor according to claim 1, wherein the base layer extends laterally to the third insulating layer.

7. The insulated gated bipolar transistor according to claim 1, wherein the enhancement layer surrounds the base layer such that the base layer is separated from the drift layer and the third insulating layer.

8. The insulated gated bipolar transistor according to claim 1, wherein the drift layer extends laterally to the fourth electrically insulating layer in an area between the first and second trench gate electrode so that the enhancement layer is separated from the third insulating layer by the drift layer.

9. The insulated gated bipolar transistor according to claim 1, wherein the fourth electrically insulating layer has a thickness between 50 to 150 nm.

10. The insulated gated bipolar transistor according to claim 1, wherein the electrically conductive layer extends outside the second trench gate electrode by 2 to 10 μ

m on each side.

11. The insulated gated bipolar transistor according to claim 1, comprising:

a further gate electrode including a further second trench gate electrode and a further electrically conducting layer, both of which are electrically connected to the emitter electrode, the further second trench gate electrode being arranged lateral to the base layer and extending deeper into the drift layer than the base layer, and the further second trench gate electrode being separated from the base layer, the enhancement layer and the drift layer by a further third insulating layer,

wherein the further electrically conductive layer covers and laterally extends outside the further second trench gate electrode at least to a region above the base layer,

wherein the further electrically conductive layer is separated from the base layer by a further fourth electrically insulating layer,

wherein the further electrically conductive layer contacts the further second trench gate electrode,

wherein the further gate electrode is arranged adjacent to the second gate electrode,

wherein the further electrically conductive layer and the further grounded trench gate electrode are arranged directly adjacent to each other, and

wherein only the drift layer is arranged in the area between the second trench gate electrode and the further second trench gate electrode.

12. The insulated gated bipolar transistor according to claim 11, comprising:

at least two further grounded trench gate electrodes.

13. The insulated gated bipolar transistor according to claim 11, wherein a distance between any two trench gate electrodes is equal to or smaller than a thickness of at least one of the trench gate electrodes.

14. The insulated gated bipolar transistor according to claim 1, comprising:

a further gate electrode arranged adjacent to the gate electrode, the further gate electrode including a further second trench gate electrode and a further electrically conducting layer, both of which are electrically connected to the emitter electrode, the further second trench gate electrode being arranged lateral to the base layer and extending deeper into the drift layer than the base layer, the further second trench gate electrode being separated from the base layer, the enhancement layer and the drift layer by a further third insulating layer,

wherein the further electrically conductive layer covers and laterally extends outside the further second trench gate electrode at least to a region above the base layer,

wherein the further electrically conductive layer is separated from the base layer by a further fourth electrically insulating layer,

wherein the further electrically conductive layer contacts the further second trench gate electrode,

wherein the electrically conductive layer and the further electrically conductive layer are separated from each other by a sixth insulating layer,

wherein the drift layer extends to the fourth insulating layer and the further fourth insulating layer, and

wherein a connection layer is arranged below the sixth insulating layer, the connection layer extending to a region below the electrically conductive layer and the further electrically conductive layer.

15. The insulated gated bipolar transistor according to claim 14, comprising:

at least two further grounded trench gate electrodes.

16. The insulated gated bipolar transistor according to claim 15, wherein a distance between any two trench gate electrodes is equal to or smaller than a thickness of at least one of the trench gate electrodes.

17. The insulated gated bipolar transistor according to claim 1, wherein a distance between any two trench gate electrodes is equal to or smaller than a thickness of at least one of the trench gate electrodes.

18. A method of manufacturing an insulated gated bipolar transistor having layers between an emitter electrode on an emitter side and a collector electrode on a collector side opposite to the emitter side, the method comprising:

providing a lowly doped wafer of a first conductivity type, part of the wafer having an unamended doping concentration in the finalized insulated gated bipolar transistor forming a drift layer;

creating at least two first trench gate electrodes and at least one second trench gate electrode;

creating, for the first and second trench gate electrodes, first and second trench gate electrode trench recesses in the wafer on the emitter side;

applying first and third insulating layers in the trench recesses and filling the trench recesses with electrically conductive material;

creating a fourth insulating layer to laterally surround the second trench gate electrode on the emitter side;

creating an electrically conductive layer on top of the second trench gate electrode, the electrically conductive layer covering and laterally extending outside the second trench gate electrode, wherein a gate electrode comprises the second trench gate electrode and the electrically conductive layer;

creating an enhancement layer by introducing a first dopant of the first conductivity type into the wafer on the emitter side using the electrically conductive layer as a mask and diffusing the first dopant into the wafer;

creating a base layer by introducing a second dopant of a second conductivity type, which is different than the first conductivity type, into the wafer on the emitter side using the electrically conductive layer as a mask and diffusing the second dopant into the wafer so that the base layer is completely separated from a remaining lowly doped wafer by the enhancement layer;

creating first and second source regions having a higher doping concentration than the lowly doped wafer by applying a third dopant of the first conductivity type between two of the first trench gate electrodes for the creation of the first source region and between one of the first trench gate electrodes and the second trench gate electrode for the creation of the second source region;

covering the electrically conductive layer with a fifth insulation layer besides a recess for a contact of the electrically conductive layer to the emitter electrode and covering the first trench gate electrode with the second insulation layer;

creating a collector layer of the second conductivity type on the collector side by introducing a fourth dopant of the second conductivity type into the wafer on the collector side and diffusing the fourth dopant into the wafer,

creating contact openings of the base layer to the emitter electrode between two of the first trench gate electrodes and between one of the first trench gate electrodes and the second trench gate electrode; and

creating the emitter electrode on the emitter side and creating the collector electrode on the collector side.