Packet detector

• US 9,154,355 B2
• Filed: 02/04/2015
• Issued: 10/06/2015
• Est. Priority Date: 07/22/2009
• Status: Active Grant

• Current Assignee: Applied Transform LLC
• Original Assignee: Aware Incorporated (Crowley Holdings Preferred LLC)
• Inventors: Tzannes, Marcos C., KIM, Joon Bae, Sandberg, Stuart
• Primary Examiner(s): HA, DAC V
• Application Number:
  US14/614,138
• Publication Number:
  US 20150188742A1
• Time in Patent Office: 244 Days
• Field of Search: 375/140, 375/141, 375/145, 375/147, 375/149, 375/267, 375/340, 375/354, 370/471, 370/500
• US Class Current: 1/1
• CPC Class Codes: H04L 25/03866 using scrambling
• CPC Class Codes: H04L 27/2602 Signal structure
• CPC Class Codes: H04L 27/2613 Structure of the reference signals
• CPC Class Codes: H04L 27/2614 Peak power aspects
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01
• CPC Class Codes: H04L 27/3472 by switching between alternative constellations
• CPC Class Codes: H04L 5/0044 allocation of payload
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers
• CPC Class Codes: H04L 7/042 Detectors therefor, e.g. correlators, state machines digital correlators in general G06F17/15

Abstract

There are several exemplary ways to more efficiently communicate an out-of-domain seed to a receiver—in a first technique, the seed can be indicated in the header portion or data portion of a packet. For example, the header portion of the packet could contain one or more bit fields that indicate the value of the LFSR seed used for the preamble portion of the packet. The receiver would learn the out-of-domain seed after receiving a first out-of-domain packet and decoding the header portion of that packet. After learning the out-of-domain seed, the receiver could send a packet indicating the value of the out-of-domain seed to the local master. The local master could then transmit the value of the out-of-domain seed in the header portion or data portion of a local MAP frame.

Claims

1. A system configured for OFDM communication comprising:

a transceiver including a receiver adapted to receive at least one packet including a header portion and preamble portion,

wherein;

the preamble portion includes a plurality of OFDM symbols that were modulated using a constellation scrambler, and

the header portion of the packet contains one or more bit fields that contain information that can be used to determine a value of a seed that was used to generate the preamble portion of the packet, and

the value of the seed is usable to determine whether the packet is an out-of-domain packet or an in-domain packet.

2. The system of claim 1, wherein the transceiver includes an ASIC.

3. The system of claim 1, wherein the transceiver includes a digital signal processor.

4. The system of claim 1, wherein the transceiver further performs one or more cross-correlations to determine whether the packet was from a transceiver or endpoint that is from an out-of-domain network or from an in-domain network.

5. The system of claim 1, wherein the transceiver further learns an out-of-domain seed after receiving a first out-of-domain packet and decoding the header portion of that packet, and after learning the out-of-domain seed, the receiver sending a packet indicating the value of the out-of-domain seed to a local master.

6. A system configured for OFDM communication comprising:

a transceiver that includes a receiver capable of receiving a packet including a header portion and a preamble portion and capable of detecting the packet using the preamble portion,

wherein;

the preamble portion was generated using an LFSR (Linear Feedback Shift Register) generator that was initialized with a seed,

the header portion of the packet contains one or more bit fields that contain information that can be used to determine a value of the seed used to generate the preamble portion of the packet, and

the value of the seed is usable to determine whether the packet is an out-of-domain packet or an in-domain packet.

7. The system of claim 6, wherein the transceiver includes an ASIC.

8. The system of claim 6, wherein the transceiver includes a digital signal processor.