System having operation queues corresponding to operation execution time

• US 9,158,579 B1
• Filed: 11/10/2008
• Issued: 10/13/2015
• Est. Priority Date: 11/10/2008
• Status: Active Grant

• Current Assignee: NetApp, Inc.
• Original Assignee: NetApp, Inc.
• Inventors: Robles, David Morgan
• Primary Examiner(s): Faherty, Corey S
• Application Number:
  US12/268,037
• Time in Patent Office: 2,528 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 21/602 Providing cryptographic facilities or services
• CPC Class Codes: G06F 2209/483 Multiproc
• CPC Class Codes: G06F 9/4818 Priority circuits therefor
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Abstract

A system and method for prioritized queues is provided. A plurality of queues are organized to enable long-running operations to be directed to a long running queue operation, while faster operations are directed to a non-long running operation queue. When an operation request is received, a determination is made whether it is a long-running operation, and, if so, the operation is placed in a long-running operation queue. When the processor core that is executing long-running operations is ready for the next operation, it removes an operation from the long-running operation queue and processes the operation.

Claims

1. A method for processing operations using a plurality of queues of a computer, the method comprising:

receiving, at a processor intake of the computer, a request;

determining, when the request is received at the processor intake, whether an operation within the request is directed to a long running operation based on an amount of time required by a processor to execute the operation within the request;

placing, in response to determining that the operation is directed to the long running operation, the operation on a long running operation queue from the plurality of queues, wherein a first processing core of the processor is associated with the long running operation queue; and

placing, in response to determining that the operation is not directed to the long running operation, the operation on a non-long running operation queue from the plurality of queues, wherein a second processing core of the processor is associated with the non-long running operation queue.

2. The method of claim 1 further comprising:

removing the operation from the long running operation queue by the first processing core;

processing the operation by the first processing core; and

placing, on a long running operation status queue, a status indicator of the processed operation.

3. The method of claim 1 further comprising:

removing the operation from the non-long running operation queue by the second processing core;

processing the operation by the second processing core; and

placing, on a non-long running operation status queue, a status indicator of the processed operation.

4. The method of claim 1 wherein the operation comprises a compression operation.

5. The method of claim 1 wherein the operation comprises an encryption operation.

6. A system for processing operations using a plurality of queues of a computer, the system comprising:

means for receiving, at a processor intake, a request;

means for determining, when the request is received at the processor intake, whether an operation within the request is directed to a long running operation based on an amount of time required by a processor to execute the operation;

means for placing, in response to determining that the operation is directed to the long running operation, the operation on a long running operation queue associated with a first processing core; and

means for placing, in response to determining that the operation is not directed to the long running operation, the operation on a non-long running operation queue associated with a second processing core.

7. A non-transitory computer readable medium containing executable program instructions executed by a processor, comprising:

program instructions that receive, at a processor intake of a computer, a request;

program instructions that determine, when the request is received at the processor intake, whether an operation within the request is directed to a long running operation based on an amount of time required to execute the operation;

program instructions that place, in response to determining that the operation is directed to the long running operation, the operation on a long running operation queue associated with a first processing core; and

program instructions that place, in response to determining that the operation is not directed to the long running operation, the operation on a non-long running operation queue associated with a second processing core.

8. A system for processing operation requests, the system comprising:

a processor having one or more processor cores;

one or more long running operation queues operatively interconnected with the processor, the one or more long running operation queues configured to store a first set of operation requests to be processed by a first set of the one or more of the processor cores;

one or more non-long running operation queues operatively interconnected with the processor, the one or more non-long running operation queues configured to store a second set of operation requests to be processed by a second set of one or more of the processor cores; and

a memory coupled to the processor and configured to store software executed by the processor, the software when executed operable to;

receive a request,

determine, when the request is received at a processor intake, whether an operation within the request is directed to a long running operation based on an amount of time required by the processor to execute the operation, and place, in response to determining that the operation is directed to the long running operation, the operation in one of the long running operation queues.

9. The system of claim 8 wherein the software is further configured to:

determine, when the request is received at the processor intake, whether the operation is directed to a non-long running operation based on the amount of time required by the processor to execute the operation, and

place, in response to determining that the operation is directed to the non-long running operation, the operation in one of the non-long running operation queues.

10. The system of claim 8 wherein the operation comprises a compression operation.

11. The system of claim 8 wherein the operation comprises an encryption operation.

12. The system of claim 8 wherein the first set of one or more processor cores is configured to remove a queued operation from the long running operation queue and process the removed queued operation.

13. The system of claim 12 wherein the first set of one or more processor cores is further configured to place a status indicator in a long running operation status queue.

14. The system of claim 8 wherein the second set of one or more processor cores is configured to remove a queued operation from the non-long running operation queue and process the removed queued operation.

15. The system of claim 14 wherein the second set of one or more processor cores is further configured to place a status indicator in a non-long running operation status queue.

16. A method for processing operations using a plurality of queues of a computer having a processor, the method comprising:

generating, by a module of the computer, an operation request;

forwarding the generated operation request to a storage encryption processor for execution;

determining, when the operation request is received at the storage encryption processor, whether the generated operation request is directed to a long running operation based on an amount of time required by the processor to execute the operation;

placing, in response to determining that the operation request received at the storage encryption processor is directed to the long running operation, the operation on a long running operation queue selected from the plurality of queues, wherein the long running operation queue is associated with a first core of the storage encryption processor; and

placing, in response to determining that the operation request received at the storage encryption processor is not directed to the long running operation, the operation request on a non-long running operation queue selected from the plurality of queues, wherein the non-long running operation queue is associated with a second core of the storage encryption processor.

17. The method of claim 16 further comprising:

removing the operation from the long running operation queue by the first core;

processing the operation by the first core of the storage encryption processor; and

placing, on a long running operation status queue, an indicator that the operation was processed.