Flash storage controller execute loop
First Claim
Patent Images
1. A method comprising:
- receiving one or more host commands over a host interface circuit in a storage controller from one or more hosts configured to communicate with the storage controller, the storage controller configured to include one or more storage processors and further configured to be coupled to a flash memory module having multiple flash memory groups, each flash memory group corresponding to a distinct flash memory port in the storage controller, each flash memory port having a flash interface processor;
creating with the one or more storage processors a plurality of transfer requests from a host command of the one or more host commands, each transfer request to perform a portion of the host command, wherein the one or more storage processors include a first processor and a second processor, wherein the first processor performs preliminary processing of the one or more host commands and the second processor creates and assigns the plurality of transfer requests;
for each transfer request of the plurality of transfer requests, assigning the transfer request to a respective worklist associated with a respective flash interface processor of a respective flash memory port, including assigning the plurality of transfer requests to two or more respective worklists associated with two or more flash interface processors of two or more flash memory ports; and
for each flash interface processor that was assigned a respective transfer request in its respective worklist, performing a task associated with the respective transfer request in the respective worklist.
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Abstract
A storage controller is provided that contains multiple processors. In some embodiments, the storage controller is coupled to a flash memory module having multiple flash memory groups, each flash memory group corresponding to a distinct flash port in the storage controller, each flash port comprising an associated processor. Each processor handles a portion of one or more host commands, including reads and writes, allowing multiple parallel pipelines to handle one or more host commands simultaneously.
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Citations
14 Claims
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1. A method comprising:
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receiving one or more host commands over a host interface circuit in a storage controller from one or more hosts configured to communicate with the storage controller, the storage controller configured to include one or more storage processors and further configured to be coupled to a flash memory module having multiple flash memory groups, each flash memory group corresponding to a distinct flash memory port in the storage controller, each flash memory port having a flash interface processor; creating with the one or more storage processors a plurality of transfer requests from a host command of the one or more host commands, each transfer request to perform a portion of the host command, wherein the one or more storage processors include a first processor and a second processor, wherein the first processor performs preliminary processing of the one or more host commands and the second processor creates and assigns the plurality of transfer requests; for each transfer request of the plurality of transfer requests, assigning the transfer request to a respective worklist associated with a respective flash interface processor of a respective flash memory port, including assigning the plurality of transfer requests to two or more respective worklists associated with two or more flash interface processors of two or more flash memory ports; and for each flash interface processor that was assigned a respective transfer request in its respective worklist, performing a task associated with the respective transfer request in the respective worklist. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A storage controller circuit comprising:
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a host interface circuit configured to receive one or more host commands from one or more hosts configured to communicate with the storage controller; one or more storage processors to process the one or more host commands; and a plurality of flash ports corresponding to a plurality of flash memory groups in a flash memory module, each flash port having a flash interface processor; the one or more storage processors configured to create a plurality of transfer requests from a host command of the one or more host commands, each transfer request to perform a portion of the host command, and wherein the one or more storage processors include a first processor and a second processor, wherein the first processor is configured to perform preliminary processing of the one or more host commands and the second processor is configured to create and assign the plurality of transfer requests; the one or more storage processors further configured to assign each one of the plurality of transfer requests to a respective worklist associated with a respective flash interface processorof a respective flash memory port, wherein the one or more storage processors are configured to assign the plurality of transfer requests to two or more respective worklists associated with two or more flash interface processors of two or more flash memory ports; and each of the flash interface processors configured for performing a task associated with the respective transfer request in the respective worklist. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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Specification