Process and apparatus to reduce declared capacity of a storage device by conditionally trimming

• US 9,158,681 B1
• Filed: 02/12/2015
• Issued: 10/13/2015
• Est. Priority Date: 09/02/2014
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Samuels, Allen, Kruger, Warren Fritz, Truong, Linh Tien
• Primary Examiner(s): Chery, Mardochee
• Application Number:
  US14/621,148
• Time in Patent Office: 243 Days
• Field of Search: 711/103, 711/104
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7204 Capacity control, e.g. partitioning, end-of-life degradation
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 2212/7206 Reconfiguration of flash memory system
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/00 Erasable programmable read-only memories G11C14/00 takes precedence
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters

Abstract

Systems, methods, and/or devices are used to reduce declared capacity of non-volatile memory of a storage device in a storage system. In one aspect, the method includes, detecting an amelioration trigger, and in accordance with the detected amelioration trigger, performing an amelioration process to reduce declared capacity of the non-volatile memory of the storage device, including: obtaining a target capacity of the non-volatile memory of the storage device and a current utilization of the non-volatile memory of the storage device, wherein the target capacity is lower than a current capacity of the non-volatile memory of the storage device and the current utilization corresponds to allocated logical addresses in a logical address space; in accordance with a determination that the target capacity is not greater than the current utilization, trimming at least a portion of the allocated logical addresses; and reducing declared capacity of the non-volatile memory of the storage device.

Claims

1. A method of managing a storage system, the method comprising:

detecting an amelioration trigger for reducing declared capacity of non-volatile memory of a storage device of the storage system; and

in accordance with the detected amelioration trigger, performing an amelioration process to reduce declared capacity of the non-volatile memory of the storage device, the performing including;

obtaining a target capacity of the non-volatile memory of the storage device and a current utilization of the non-volatile memory of the storage device, wherein the target capacity is lower than a current capacity of the non-volatile memory of the storage device and the current utilization corresponds to allocated logical addresses in a logical address space;

determining whether the target capacity of the non-volatile memory of the storage device is greater than the current utilization of the non-volatile memory of the storage device;

in accordance with a determination that the target capacity is greater than the current utilization, forgoing trimming of the allocated logical addresses;

in accordance with a determination that the target capacity is not greater than the current utilization, trimming at least a portion of the allocated logical addresses; and

reducing declared capacity of the non-volatile memory of the storage device.

2. The method of claim 1, further comprising:

prior to detecting the amelioration trigger, detecting a first wear condition of the non-volatile memory of the storage device, wherein a total storage capacity of the non-volatile memory of the storage device includes declared capacity and over-provisioning; and

in response to detecting the first wear condition, performing a remedial action that reduces over-provisioning of the non-volatile memory of the storage device without reducing declared capacity of the non-volatile memory of the storage device.

3. The method of claim 2, wherein detecting the amelioration trigger comprises detecting a second wear condition distinct from the first wear condition.

4. The method of claim 1, wherein the detecting, the performing, or both the detecting and the performing are performed by the storage device.

5. The method of claim 1, wherein the detecting, the performing, or both the detecting and the performing are performed by one or more subsystems of the storage system distinct from the storage device.

6. The method of claim 1, wherein the detecting, the performing, or both the detecting and the performing are performed by a host.

7. The method of claim 6, wherein the host includes a client on behalf of which data is stored in the storage system.

8. The method of claim 6, wherein the host includes a storage system controller of the storage system.

9. The method of claim 6, wherein the host includes a cluster controller of the storage system.

10. The method of claim 1, wherein trimming at least a portion of the allocated logical addresses includes trimming at least a portion of the allocated logical addresses in accordance with one or more parameters for the amelioration process.

11. The method of claim 1, wherein trimming at least a portion of the allocated logical addresses includes:

obtaining information specifying a set of logical addresses in the logical address space; and

invalidating one or more logical address entries, associated with the set of logical addresses, of a mapping table, the mapping table used to translate logical addresses in the logical address space to physical addresses in a physical address space of the storage device.

12. The method of claim 11, wherein reducing declared capacity of the non-volatile memory of the storage device includes making a number of logical addresses, less than or equal to a number of logical addresses corresponding to the invalidated logical address entries, unavailable to the host.

13. The method of claim 1, wherein performing the amelioration process to reduce declared capacity of the non-volatile memory of the storage device further includes advertising a reduced declared capacity of the non-volatile memory of the storage device.

14. The method of claim 1, further comprising:

after beginning performance of the amelioration process to reduce declared capacity of the non-volatile memory of the storage device, detecting an indication to abort the reduction in declared capacity of the non-volatile memory of the storage device; and

in response to detecting the indication to abort the reduction in declared capacity of the non-volatile memory of the storage device, aborting performance of the amelioration process to reduce declared capacity of the non-volatile memory of the storage device.

15. The method of claim 1, wherein performing the amelioration process to reduce declared capacity of the non-volatile memory of the storage device includes reducing utilization of the non-volatile memory of the storage device.

16. The method of claim 1, wherein the storage device comprises one or more flash memory devices.

17. A storage device, comprising:

non-volatile memory;

one or more processors; and

controller memory storing one or more programs, which when executed by the one or more processors cause the storage device to perform operations comprising;

detecting an amelioration trigger for reducing declared capacity of non-volatile memory of the storage device; and

in accordance with the detected amelioration trigger, performing an amelioration process to reduce declared capacity of the non-volatile memory of the storage device, the performing including;

obtaining a target capacity of the non-volatile memory of the storage device and a current utilization of the non-volatile memory of the storage device, wherein the target capacity is lower than a current capacity of the non-volatile memory of the storage device and the current utilization corresponds to allocated logical addresses in a logical address space;

determining whether the target capacity of the non-volatile memory of the storage device is greater than the current utilization of the non-volatile memory of the storage device;

in accordance with a determination that the target capacity is greater than the current utilization, forgoing trimming of the allocated logical addresses;

in accordance with a determination that the target capacity is not greater than the current utilization, trimming at least a portion of the allocated logical addresses; and

reducing declared capacity of the non-volatile memory of the storage device.

18. The storage device of claim 17, wherein the one or more programs further include instructions that, when executed by the one or more processors, cause the storage device to perform operations comprising:

prior to detecting the amelioration trigger, detecting a first wear condition of the non-volatile memory of the storage device, wherein a total storage capacity of the non-volatile memory of the storage device includes declared capacity and over-provisioning; and

in response to detecting the first wear condition, performing a remedial action that reduces over-provisioning of the non-volatile memory of the storage device without reducing declared capacity of the non-volatile memory of the storage device.

26. The storage device of claim 17, wherein detecting the amelioration trigger comprises detecting a second wear condition distinct from the first wear condition.

27. The storage device of claim 17, wherein trimming at least a portion of the allocated logical addresses includes:

obtaining information specifying a set of logical addresses in the logical address space; and

invalidating one or more logical address entries, associated with the set of logical addresses, of a mapping table, the mapping table used to translate logical addresses in the logical address space to physical addresses in a physical address space of the storage device.

28. The storage device of claim 27, wherein reducing declared capacity of the non-volatile memory of the storage device includes making a number of logical addresses, less than or equal to a number of logical addresses corresponding to the invalidated logical address entries, unavailable to the host.

29. The storage device of claim 17, wherein performing the amelioration process to reduce declared capacity of the non-volatile memory of the storage device further includes advertising a reduced declared capacity of the non-volatile memory of the storage device.

30. The storage device of claim 17, wherein the non-volatile memory of the storage device comprises one or more flash memory devices.

31. The storage device of claim 17, wherein the storage device includes a storage controller that comprises the one or more processors, the controller memory, and an amelioration module for detecting the amelioration trigger and performing the amelioration process.

32. The storage device of claim 31, wherein the amelioration module includes a detection module for detecting the amelioration trigger, a utilization module for reducing utilization of the non-volatile memory of the storage device, and a capacity module for reducing declared capacity of the non-volatile memory of the storage device.

19. A non-transitory computer readable storage medium, storing one or more programs configured for execution by one or more processors of a storage device, the one or more programs including instructions for:

detecting an amelioration trigger for reducing declared capacity of non-volatile memory of the storage device; and

in accordance with the detected amelioration trigger, performing an amelioration process to reduce declared capacity of the non-volatile memory of the storage device, the performing including;

obtaining a target capacity of the non-volatile memory of the storage device and a current utilization of the non-volatile memory of the storage device, wherein the target capacity is lower than a current capacity of the non-volatile memory of the storage device and the current utilization corresponds to allocated logical addresses in a logical address space;

determining whether the target capacity of the non-volatile memory of the storage device is greater than the current utilization of the non-volatile memory of the storage device;

in accordance with a determination that the target capacity is greater than the current utilization, forgoing trimming of the allocated logical addresses;

in accordance with a determination that the target capacity is not greater than the current utilization, trimming at least a portion of the allocated logical addresses; and

reducing declared capacity of the non-volatile memory of the storage device.

20. The non-transitory computer readable storage medium of claim 19, wherein the one or more programs further include instructions for:

prior to detecting the amelioration trigger, detecting a first wear condition of the non-volatile memory of the storage device, wherein a total storage capacity of the non-volatile memory of the storage device includes declared capacity and over-provisioning; and

in response to detecting the first wear condition, performing a remedial action that reduces over-provisioning of the non-volatile memory of the storage device without reducing declared capacity of the non-volatile memory of the storage device.

21. The non-transitory computer readable storage medium of claim 20, wherein detecting the amelioration trigger comprises detecting a second wear condition distinct from the first wear condition.

22. The non-transitory computer readable storage medium of claim 19, wherein trimming at least a portion of the allocated logical addresses includes:

obtaining information specifying a set of logical addresses in the logical address space; and

invalidating one or more logical address entries, associated with the set of logical addresses, of a mapping table, the mapping table used to translate logical addresses in the logical address space to physical addresses in a physical address space of the storage device.

23. The non-transitory computer readable storage medium of claim 22, wherein reducing declared capacity of the non-volatile memory of the storage device includes making a number of logical addresses, less than or equal to a number of logical addresses corresponding to the invalidated logical address entries, unavailable to the host.

24. The non-transitory computer readable storage medium of claim 19, wherein performing the amelioration process to reduce declared capacity of the non-volatile memory of the storage device further includes advertising a reduced declared capacity of the non-volatile memory of the storage device.

25. The non-transitory computer readable storage medium of claim 19, wherein the storage device comprises one or more flash memory devices.