Flash-DRAM hybrid memory module
First Claim
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1. A memory module comprising:
- a first plurality of data signal lines forming a first data bus;
a second plurality of data signal lines forming a second data bus;
a third plurality of data signal lines forming a data bus;
a data manager coupled to the data bus, the first data bus, and the second data bus, wherein the memory module is couplable to a memory controller of a host system using the data bus, a control bus, and an address bus;
a non-volatile memory subsystem coupled to the data manager using the first data bus, the non-volatile memory subsystem operable to communicate data signals with the data manager by way of the first data bus;
a volatile memory subsystem coupled to the data manager using the second data bus, the volatile memory subsystem operable to communicate data signals with the data manager by way of the second data bus; and
a controller operable to receive one or more memory access commands from the memory controller of the host system by way of the control bus and the address bus, the controller operable to generate at least one of a first, second and third plurality of signals in response to the one or more memory access commands received from the memory controller of the host system, the controller operable to direct (i) operation of the non-volatile memory subsystem using the first plurality of signals, (ii) operation of the volatile memory subsystem using the second plurality of signals, and (iii) operation of the data manager using the third plurality of signals.
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Abstract
A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem, a data manager coupled to the non-volatile memory subsystem, a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.
96 Citations
24 Claims
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1. A memory module comprising:
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a first plurality of data signal lines forming a first data bus; a second plurality of data signal lines forming a second data bus; a third plurality of data signal lines forming a data bus; a data manager coupled to the data bus, the first data bus, and the second data bus, wherein the memory module is couplable to a memory controller of a host system using the data bus, a control bus, and an address bus; a non-volatile memory subsystem coupled to the data manager using the first data bus, the non-volatile memory subsystem operable to communicate data signals with the data manager by way of the first data bus; a volatile memory subsystem coupled to the data manager using the second data bus, the volatile memory subsystem operable to communicate data signals with the data manager by way of the second data bus; and a controller operable to receive one or more memory access commands from the memory controller of the host system by way of the control bus and the address bus, the controller operable to generate at least one of a first, second and third plurality of signals in response to the one or more memory access commands received from the memory controller of the host system, the controller operable to direct (i) operation of the non-volatile memory subsystem using the first plurality of signals, (ii) operation of the volatile memory subsystem using the second plurality of signals, and (iii) operation of the data manager using the third plurality of signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A memory module comprising:
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a data manager couplable to a memory controller of a host system using a data bus, the data manager operable to communicate data signals with the memory controller of the host system by way of the data bus using a first protocol; a non-volatile memory subsystem coupled to the data manager using a first data bus, the non-volatile memory subsystem operable to communicate data signals with the data manager by way of the first data bus using a second protocol; a volatile memory subsystem coupled to the data manager using a second data bus, the volatile memory subsystem operable to communicate data signals with the data manager by way of the second data bus using the first protocol; and a controller operable to receive one or more commands from the memory controller of the host system via a control bus and an address bus using the first protocol, and in response to the one or more commands from the memory controller of the host system, the controller is operable to direct (i) operation of the non-volatile memory subsystem using a first plurality of signals, (ii) operation of the volatile memory subsystem using a second plurality of signals, and (iii) operation of the data manager using a third plurality of signals, wherein in response to any one or more of the first, second, and third plurality of signals the data manager communicates data signals with at least one of the memory controller of the host system, the volatile memory subsystem, and the non-volatile memory subsystem. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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Specification