Method and system for template assisted wafer bonding using pedestals

• US 9,159,631 B2
• Filed: 04/24/2014
• Issued: 10/13/2015
• Est. Priority Date: 01/04/2012
• Status: Active Grant

• Current Assignee: Skorpios Technologies Inc.
• Original Assignee: Skorpios Technologies Inc.
• Inventors: Marchena, Elton
• Primary Examiner(s): Geyer, Scott B
• Application Number:
  US14/261,276
• Publication Number:
  US 20140342479A1
• Time in Patent Office: 537 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G02B 6/13 Integrated optical circuits characterised by the manufacturing method
• CPC Class Codes: H01L 21/76251 using bonding techniques
• CPC Class Codes: H01L 21/8258 the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
• CPC Class Codes: H01L 2223/54426 for alignment
• CPC Class Codes: H01L 2223/54453 for use prior to dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01S 5/0215 Bonding to the substrate
• CPC Class Codes: H01S 5/3013 AIIIBV compounds

Abstract

A method of fabricating a composite semiconductor structure includes providing a first substrate comprising a first material and having a first surface and forming a plurality of pedestals extending to a predetermined height in a direction normal to the first surface. The method also includes attaching a plurality of elements comprising a second material to each of the plurality of pedestals, providing a second substrate having one or more structures disposed thereon, and aligning the first substrate and the second substrate. The method further includes joining the first substrate and the second substrate to form the composite substrate structure and removing at least a portion of the first substrate from the composite substrate structure.

Claims

1. A method of fabricating a composite semiconductor structure, the method comprising:

providing a first substrate comprising;

a first surface; and

a pedestal, wherein;

the pedestal extends from the first surface to a predetermined height; and

the pedestal extends in a direction normal to the first surface;

providing a second substrate comprising a first material and a recess;

attaching an element made of a second material to the pedestal;

bonding the element in the recess of the second substrate to form the composite semiconductor structure, wherein the first surface of the first substrate does not contact the second substrate; and

removing at least a portion of the first substrate from the composite structure.

2. A method of fabricating a composite semiconductor structure, the method comprising:

providing a first substrate comprising;

a first surface; and

a pedestal, wherein;

the pedestal extends from the first surface to a predetermined height; and

the pedestal extends in a direction normal to the first surface;

providing a second substrate comprising a first material and a recess;

attaching an element made of a second material to the pedestal; and

bonding the element in the recess of the second substrate to form the composite semiconductor structure, wherein the first surface of the first substrate does not contact the second substrate.

3. The method of fabricating the composite semiconductor structure as recited in claim 2, the method further comprising removing at least a portion of the first substrate from the composite structure.

4. The method of fabricating the composite semiconductor structure as recited in claim 2 wherein the first substrate further comprises a splitting region in the pedestal.

5. The method of fabricating the composite semiconductor structure as recited in claim 4, wherein the splitting region comprises an implanted region.

6. The method of fabricating the composite semiconductor structure as recited in claim 2, wherein:

the recess has a depth;

the first substrate further comprises a splitting region in the pedestal;

the splitting region is a given distance from the predetermined height of the pedestal;

the element has a given thickness;

the depth of the recess is less than the sum of the given thickness of the element and the given distance between the splitting region and the predetermined height of the pedestal.

7. The method of fabricating the composite semiconductor structure as recited in claim 2, wherein:

the second substrate has a device surface; and

one or more structures are on the device surface.

8. The method of fabricating the composite semiconductor structure as recited in claim 7, wherein the one or more structures comprise at least one of an optical element or an integrated circuit.

9. The method of fabricating the composite semiconductor structure as recited in claim 2, wherein:

the first material is silicon; and

the second material comprises at least one of III-V material, ferromagnetic materials, or nonlinear optical materials.

10. The method of fabricating the composite semiconductor structure as recited in claim 2, further comprising forming the pedestal, wherein the pedestal is formed by masking and etching.

11. A method of fabricating a composite semiconductor structure, the method comprising:

providing a SOI substrate;

providing a photonic die;

providing an assembly substrate, the assembly substrate comprising;

a first surface; and

a pedestal, wherein;

the pedestal extends from the first surface to a predetermined height; and

the pedestal extends in a direction normal to the first surface;

mounting the photonic die to the pedestal of the assembly substrate; and

joining the photonic die to the SOI substrate to form the composite structure, wherein the first surface of the assembly substrate does not contact the SOI substrate.

12. The method of fabricating the composite semiconductor structure as recited in claim 11, the method further comprising removing at least a portion of the assembly substrate from the composite structure.

13. The method of fabricating the composite semiconductor structure as recited in claim 11, wherein the assembly substrate further comprises a second pedestal and the method further comprises:

attaching a second die to the second pedestal; and

bonding the second die to the SOI substrate.

14. The method of fabricating the composite semiconductor structure as recited in claim 13, wherein the die and the second die are both diced from a common semiconductor substrate.

15. The method of fabricating the composite semiconductor structure as recited in claim 11, wherein the SOI substrate comprises a plurality of silicon-based devices.

16. The method of fabricating the composite semiconductor structure as recited in claim 15, wherein the plurality of silicon-based devices comprise an electrical or optical element.

17. The method of fabricating the composite semiconductor structure as recited in claim 11, wherein the die comprises a laser gain medium, a detector active medium, or a modulator active medium.

18. The method of fabricating the composite semiconductor structure as recited in claim 11, further comprising aligning the assembly substrate with the SOI substrate before bonding the die to the SOI substrate.

19. The method of fabricating the composite semiconductor structure as recited in claim 11, wherein providing the assembly substrate comprises oxidizing a silicon substrate.

20. The method of fabricating the composite semiconductor structure as recited in claim 11, wherein the pedestal comprises a splitting region.