Enhanced photon detection device with biased deep trench isolation

• US 9,160,949 B2
• Filed: 04/01/2013
• Issued: 10/13/2015
• Est. Priority Date: 04/01/2013
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Zhang, Bowei, Lin, Zhiqiang
• Primary Examiner(s): Sohn, Seung C
• Application Number:
  US13/854,446
• Publication Number:
  US 20140291481A1
• Time in Patent Office: 925 Days
• Field of Search: 250/208.1, 257/443
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 31/02 Details
• CPC Class Codes: H01L 31/02027 for devices working in avalanche mode
• CPC Class Codes: H01L 31/107 the potential barrier working in avalanche mode, e.g. avalanche photodiodes
• CPC Class Codes: H04N 25/63 applied to dark current

Abstract

A photon detection device includes a photodiode having a planar junction disposed in a first region of semiconductor material. A deep trench isolation (DTI) structure is disposed in the semiconductor material. The DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. The DTI structure includes a dielectric layer lining an inside surface of the DTI structure and doped semiconductor material disposed over the dielectric layer inside the DTI structure. The doped semiconductor material disposed inside the DTI structure is coupled to a bias voltage to isolate the photodiode in the first region of the semiconductor material from the second region of the semiconductor material.

Claims

1. A photon detection device, comprising:

a photodiode having a planar junction disposed in a first region of semiconductor material, wherein the semiconductor material includes P doped silicon and the planar junction includes an N doped silicon region disposed proximate to a P doped silicon region in the semiconductor material, wherein a doping density in the N doped silicon region gradually decreases towards an edge of the N doped silicon region, wherein the edge of the N doped silicon region does not utilize a guard ring or a doped well for isolation; and

a deep trench isolation (DTI) structure disposed in the semiconductor material, wherein the DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure, wherein the DTI structure includes;

a dielectric layer lining an inside surface of the DTI structure; and

doped semiconductor material disposed over the dielectric layer inside the DTI structure, wherein the doped semiconductor material disposed inside the DTI structure is coupled to a bias voltage to isolate the photodiode in the first region of the semiconductor material from the second region of the semiconductor material.

2. The photon detection device of claim 1 wherein the planar junction is coupled to be reverse biased such that electrons drift from the P doped silicon in the semiconductor material into the planar junction.

3. The photon detection device of claim 1 wherein the photodiode having the planar junction disposed in the first region of the semiconductor material includes a single photon avalanche diode (SPAD), wherein the doped semiconductor material disposed in the DTI structure is biased to reduce dark current in a photo collection area the SPAD.

4. The photon detection device of claim 3 further comprising a quenching circuit disposed in the second region of the semiconductor material and coupled to the SPAD to limit an avalanche current in the SPAD, wherein the doped semiconductor material disposed in the DTI structure is biased to isolate high field regions of the SPAD from the quenching circuit.

5. The photon detection device of claim 4 wherein the first region of the semiconductor material is coupled to a first voltage to bias the first region of the semiconductor material at the first voltage, wherein the second region of the semiconductor material is coupled to a second voltage to bias the second region of the semiconductor material at the second voltage.

6. The photon detection device of claim 5 wherein the planar junction of the photodiode is coupled to a third voltage, wherein a reverse bias in the planar junction of the photodiode is responsive to the first voltage coupled to the first region and the third voltage coupled to the planar junction of the photo diode.

7. The photon detection device of claim 3 further comprising a second photodiode including a second SPAD disposed in the second region of the semiconductor material, wherein the doped semiconductor material disposed in the DTI structure is biased to isolate high field regions of the SPAD from high field regions of the second SPAD.

8. The photon detection device of claim 7 wherein the first and second regions of the semiconductor material are coupled to a first voltage to bias the first and second regions of the semiconductor material at the first voltage.

9. The photon detection device of claim 8 wherein the semiconductor material includes a shared biasing node coupled to the first and second regions of the semiconductor material, wherein the shared biasing node is coupled to the first voltage to bias the first and second regions of the semiconductor material at the first voltage.

10. The photon detection device of claim 3 wherein the SPAD is adapted to be illuminated from a back side of the semiconductor material.

11. The photon detection device of claim 1 wherein the dielectric layer lining the inside surface of the DTI structure includes silicon dioxide.

12. The photon detection device of claim 1 wherein the doped semiconductor material disposed over the dielectric layer inside the DTI structure includes lightly doped polysilicon.

13. A photon sensing system, comprising:

a pixel array having a plurality of pixel cells, wherein each one of the plurality of pixel cells includes;

a photodiode having a planar junction disposed in a first region of semiconductor material, wherein the semiconductor material includes P doped silicon and the planar junction includes an N doped silicon region disposed proximate to a P doped silicon region in the semiconductor material, wherein a doping density in the N doped silicon region gradually decreases towards an edge of the N doped silicon region, wherein the edge of the N doped silicon region does not utilize a guard ring or a doped well for isolation; and

a deep trench isolation (DTI) structure disposed in the semiconductor material, wherein the DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure, wherein the DTI structure includes a dielectric layer lining an inside surface of the DTI structure and doped semiconductor material disposed over the dielectric layer inside the DTI structure, wherein the doped semiconductor material disposed inside the DTI structure is coupled to a bias voltage to isolate the photodiode in the first region of the semiconductor material from the second region of the semiconductor material;

control circuitry coupled to the pixel array to control operation of the pixel array; and

readout circuitry coupled to the pixel array to readout photon data from the plurality of pixel cells.

14. The photon sensing system of claim 13 further comprising function logic coupled to the readout circuitry to store the photon data readout from the plurality of pixel cells.

15. The photon sensing system of claim 14 wherein the dielectric layer lining the inside surface of the DTI structure includes silicon dioxide.

16. The photon sensing system of claim 14 wherein the doped semiconductor material disposed over the dielectric layer inside the DTI structure includes lightly doped polysilicon.

17. The photon sensing system of claim 13 wherein the readout circuitry includes:

counter circuitry coupled to receive the photon data to count photon events in the photon data received from each one of the plurality of pixel cells; and

time to digital converter circuitry coupled to the counter circuitry to record photon timing information associated with the photon events in the photon data.

18. The photon sensing system of claim 13 wherein the photodiode having the planar junction disposed in the first region of the semiconductor material includes a single photon avalanche diode (SPAD), wherein the doped semiconductor material disposed in the DTI structure is biased to reduce dark current in a photo collection area the SPAD.

19. The photon sensing system of claim 18 further comprising a quenching circuit disposed in the second region of the semiconductor material and coupled to the SPAD to limit an avalanche current in the SPAD, wherein the doped semiconductor material disposed in the DTI structure is biased to isolate high field regions of the SPAD from the quenching circuit.

20. The photon sensing system of claim 19 wherein the first region of the semiconductor material is coupled to a first voltage to bias the first region of the semiconductor material at the first voltage, wherein the second region of the semiconductor material is coupled to a second voltage to bias the second region of the semiconductor material at the second voltage.

21. The photon sensing system of claim 20 wherein the planar junction of the photodiode is coupled to a third voltage, wherein a reverse bias in the planar junction of the photodiode is responsive to the first voltage coupled to the first region and the third voltage coupled to the planar junction of the photodiode.

22. The photon sensing system of claim 18 further comprising a second photodiode including a second SPAD disposed in the second region of the semiconductor material, wherein the doped semiconductor material disposed in the DTI structure is biased to isolate high field regions of the SPAD from high field regions of the second SPAD.

23. The photon sensing system of claim 22 wherein the first and second regions of the semiconductor material are coupled to a first voltage to bias the first and second regions of the semiconductor material at the first voltage.

24. The photon sensing system of claim 23 wherein the semiconductor material includes a shared biasing node coupled to the first and second regions of the semiconductor material, wherein the shared biasing node is coupled to the first voltage to bias the first and second regions of the semiconductor material at the first voltage.

25. The photon sensing system of claim 18 wherein the SPAD is adapted to be illuminated from a back side of the semiconductor material.