Integrated circuit device and method for determining an index of an extreme value within an array of values

• US 9,165,023 B2
• Filed: 01/31/2011
• Issued: 10/20/2015
• Est. Priority Date: 01/31/2011
• Status: Expired due to Fees

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Moskovich, Ilia, Amir, Aviram, Barak, Itzhak, Ben Zeev, Eliezer
• Primary Examiner(s): RHU, KRIS M
• Application Number:
  US13/978,251
• Publication Number:
  US 20130297578A1
• Time in Patent Office: 1,723 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 16/2272 Management thereof
• CPC Class Codes: G06F 9/30021 Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations

Abstract

An integrated circuit device comprises at least one digital signal processor, DSP, module, the at least one DSP module comprising a plurality of data registers and at least one data execution unit, DEU, module arranged to execute operations on data stored within the data registers. The at least one DEU module is arranged to, in response to receiving an extreme value index instruction, compare a previous extreme value located within a first data register set of the DSP module with at least one input vector data value located within a second data register set of the DSP module, and determine an extreme value thereof. The at least one DEU module is further arranged to, if the determined extreme value comprises an input vector data value located within the second data register set, store the determined extreme value in the first data register set, determine an index value for the determined extreme value, and store the determined index value in the first data register set.

Claims

1. An integrated circuit device comprising:

at least one digital signal processor (DSP) module, the at least one DSP module comprising a plurality of data registers and at least one data execution unit (DEU) module arranged to execute operations on data stored within the data registers;

wherein the at least one DEU module is arranged to, in response to receiving an extreme value index instruction, compare a previous extreme value located within a first data register set of the DSP module with at least one input vector data value located within a second data register set of the DSP module, and determine an extreme value thereof;

wherein the at least one DEU module is further arranged to, if the determined extreme value comprises an input vector data value located within the second data register set, store the determined extreme value in the first data register set, determine an index value for the determined extreme value, and store the determined index value in the first data register set.

2. The integrated circuit device of claim 1 wherein the at least one DEU module is arranged to overwrite the previous extreme value located within the first data register set with the determined extreme value, if the determined extreme value comprises the input vector data value located within the second data register set.

3. The integrated circuit device of claim 1 wherein the at least one DEU module is arranged to overwrite an index value for the previous extreme value located within the first data register set with the determined index value for the determined extreme value, if the determined extreme value comprises the input vector data value located within the second data register set.

4. The integrated circuit device of claim 1 wherein the at least one DEU module is arranged to determine an index value for the determined extreme value based on a current index value located within the first data register set and an index value for a location of the determined extreme value within the second data register set, if the determined extreme value comprises the input vector data value located within the second data register set.

5. The integrated circuit device of claim 4 wherein the at least one DEU module is further arranged to increment the current index value located within the first data register set during execution of the received extreme value index instruction.

6. The integrated circuit device of claim 5 wherein the at least one DEU module is arranged to increment the current index value by an amount equal to an index stride value located within the first data register set during execution of the received extreme value index instruction.

7. The integrated circuit device of claim 1 wherein the first data register set comprises at least one data register arranged to store therein at least one from a group consisting of:

an index stride value;

a previous extreme value;

an index value for the previous extreme value; and

a current index value.

8. The integrated circuit device of claim 1 wherein the extreme value index instruction comprises a maximum value index instruction or a minimum value index instruction.

10. The integrated circuit device of claim 2 wherein the at least one DEU module is arranged to overwrite an index value for the previous extreme value located within the first data register set with the determined index value for the determined extreme value, if the determined extreme value comprises the input vector data value located within the second data register set.

11. The integrated circuit device of claim 2 wherein the at least one DEU module is arranged to determine an index value for the determined extreme value based on a current index value located within the first data register set and an index value for a location of the determined extreme value within the second data register set, if the determined extreme value comprises the input vector data value located within the second data register set.

12. The integrated circuit device of claim 3 wherein the at least one DEU module is arranged to determine an index value for the determined extreme value based on a current index value located within the first data register set and an index value for a location of the determined extreme value within the second data register set, if the determined extreme value comprises the input vector data value located within the second data register set.

13. The integrated circuit device of claim 2 wherein the first data register set comprises at least one data register arranged to store therein at least one from a group consisting of:

an index stride value;

a previous extreme value;

an index value for the previous extreme value; and

a current index value.

14. The integrated circuit device of claim 3 wherein the first data register set comprises at least one data register arranged to store therein at least one from a group consisting of:

an index stride value;

a previous extreme value;

an index value for the previous extreme value; and

a current index value.

15. The integrated circuit device of claim 4 wherein the first data register set comprises at least one data register arranged to store therein at least one from a group consisting of:

an index stride value;

a previous extreme value;

an index value for the previous extreme value; and

a current index value.

16. The integrated circuit device of claim 5 wherein the first data register set comprises at least one data register arranged to store therein at least one from a group consisting of:

an index stride value;

a previous extreme value;

an index value for the previous extreme value; and

the current index value.

17. The integrated circuit device of claim 6 wherein the first data register set comprises at least one data register arranged to store therein at least one from a group consisting of:

an index stride value;

a previous extreme value;

an index value for the previous extreme value; and

the current index value.

18. The integrated circuit device of claim 2 wherein the extreme value index instruction comprises a maximum value index instruction or a minimum value index instruction.

19. The integrated circuit device of claim 3 wherein the extreme value index instruction comprises a maximum value index instruction or a minimum value index instruction.

20. The integrated circuit device of claim 4 wherein the extreme value index instruction comprises a maximum value index instruction or a minimum value index instruction.

9. A method for determining an index for an extreme value within an array of values;

the method comprising;

comparing a previous extreme value located within a first data register set and at least one input vector data value located within a second data register set and determining an extreme value thereof; and

in response to determining that the extreme value thereof comprises an input vector data value located within the second data register set;

storing the determined extreme value in the first data register set;

determining an index value for the determined extreme value; and

storing the determined index value in the first data register set.