Reducing thermal gradients to improve thermopile performance

• US 9,166,083 B2
• Filed: 03/04/2013
• Issued: 10/20/2015
• Est. Priority Date: 09/09/2010
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Meinel, Walter, Lazarov, Kalin
• Primary Examiner(s): SMITH, COURTNEY L
• Application Number:
  US13/783,737
• Publication Number:
  US 20130175072A1
• Time in Patent Office: 960 Days
• Field of Search: 361676-678, 36167946-67954, 361688-722, 361748-751, 361760-783, 361/831, 174/50.52, 174/51, 174/71.R, 174/72.R, 174/250, 174/252, 174/255, 174/258, 174260-263, 174547-578
• US Class Current: 1/1
• CPC Class Codes: H01L 31/024 Arrangements for cooling, heating, ventilating or temperature compensation for photovoltaic devices H01L31/052
• CPC Class Codes: H05K 1/0201 Thermal arrangements, e.g. for cooling, heating or preventing overheating
• CPC Class Codes: H05K 1/113 Via provided in pad; Pad over filled via
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/062 Means for thermal insulation, e.g. for protection of parts
• CPC Class Codes: H05K 2201/10121 Optical component, e.g. opto-electronic component
• CPC Class Codes: H05K 2201/10151 Sensor

Abstract

With infrared (IR) sensors, repeatability and accuracy can become an issue when there are thermal gradients between the sensor and an underlying printed circuit board (PCB). Conventionally, a large thermal mass is included in the sensor packaging to reduce the effect from such thermal gradients, but this increase costs and size of the sensor. Here, however, a PCB is provided that includes an isothermal cage included therein that generally ensures that the temperature of the underlying PCB and sensor are about the same by including structural features (namely, the isothermal cage) that generally ensure that the thermal time constant for a path from a heat source to the thermopile (which is within the sensor) is approximately the same as thermal time constants for paths through the PCB.

Claims

1. A substrate assembly comprising:

A. a planar substrate formed of an electrical and thermal insulating material;

B. an integrated circuit seat formed on a top surface of the substrate, the seat including contact pads and traces extending from the contact pads; and

C. an isothermal cage in the substrate that substantially surrounds the seat, the cage including thermal conductors in the substrate at the periphery of the cage with the thermal conductors at different levels in the substrate, the isothermal cage including a conductive dot at the center of the integrated circuit seat, the conductive dot having a top surface at the top surface of the substrate and a portion extending part way into the electrical and thermal insulating material of the substrate, the conductive dot being connected to a contact pad by one of the traces at one of the levels in the substrate.

2. The assembly of claim 1 including vias formed through the substrate between the cage and the seat, the vias being filled with an electrically conductive material, a first via being electrically and thermally connected to one of the traces and to the thermal conductors, and a second via being electrically and thermally isolated from the thermal conductors and being electrically connected to another one of the traces.

3. The assembly of claim 2 in which the first via is connected to a circuit ground trace and contact pad.

4. The assembly of claim 2 in which the second via is connected to a trace to be connected to other circuitry.

5. The assembly of claim 1 in which the seat has dimensions of approximately 0.06 inch by 0.06 inch and the cage has dimensions of approximately 0.075 inch by 0.075 inch.

6. The assembly of claim 2 in which the vias have a diameter of approximately 0.015 inch.

7. The assembly of claim 1 in which the thermal conductors are laminations in the substrate.

8. The assembly of claim 1 in which the substrate is a printed circuit board.

9. The assembly of claim 2 in which the conductive dot is thermally connected to the first via.

10. The assembly of claim 1 in which the conductive dot has dimensions of about 0.015 inch by 0.015 inch.