Integrated control for silicon photonics

• US 9,166,704 B1
• Filed: 07/03/2014
• Issued: 10/20/2015
• Est. Priority Date: 07/17/2013
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Inphi Corporation
• Inventors: Nagarajan, Radhakrishnan
• Primary Examiner(s): WOLDEKIDAN, HIBRET ASNAKE
• Application Number:
  US14/323,254
• Time in Patent Office: 474 Days
• Field of Search: 398/192, 398/196, 398/197, 398/164, 398/140, 398/158, 398/94, 398/95
• US Class Current: 1/1
• CPC Class Codes: H01S 5/0261 Non-optical elements, e.g. laser driver components, heaters H01S5/0265 takes precedence
• CPC Class Codes: H01S 5/0427 for applying modulation to the laser
• CPC Class Codes: H03L 2207/50 All digital phase-locked loop
• CPC Class Codes: H03L 7/0807 concerning mainly a recovery circuit for the reference signal
• CPC Class Codes: H04B 10/07955 Monitoring or measuring power
• CPC Class Codes: H04B 10/40 Transceivers
• CPC Class Codes: H04B 10/541 Digital intensity or amplitude modulation
• CPC Class Codes: H04B 10/5561 Digital phase modulation
• CPC Class Codes: H04B 10/70 Photonic quantum communication
• CPC Class Codes: H04B 10/801 using optical interconnects, e.g. light coupled isolators, circuit board interconnections
• CPC Class Codes: H04J 14/0221 Power control, e.g. to keep the total optical power constant
• CPC Class Codes: H04L 49/109 Integrated on microchip, e.g. switch-on-chip

Abstract

In an example, the present invention includes an integrated system on chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. The device also has an interface configured to communicate between the silicon photonics device and the control block.

Claims

1. A monolithically integrated system on chip device, the device comprising:

a single silicon substrate member;

a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the substrate member and coupled to the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

a signal processing block provided on the substrate member and coupled to the input/output block, the signal processing block configured to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the substrate member and coupled to the signal processing block, the driver module coupled to the signal processing block using a uni-directional multi-lane bus;

a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format;

a receiver module comprising a TIA block provided on the substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;

a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, the driver block, and the receiver block;

a communication interface coupled to the communication block;

a control block provided on the substrate member and coupled to the communication block;

a control interface provided to communicate between the control block and the silicon photonics device, the control interface comprising;

a modulator bias voltage input;

a laser DC bias current input;

a photocurrent or set output;

a power monitor current/voltage output;

a photodetector bias input;

a heater current/voltage input;

a photocurrent from input signal or set output;

a wavelength monitor voltage/current/resistance output.

2. The device of claim 1 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block.

3. The device of claim 1 wherein the driver module is selected from a current drive or a voltage driver.

4. The device of claim 1 wherein the driver module is a differential driver.

5. The device of claim 1 wherein the amplified modulation format is selected from NRZ format or PAM format.

6. The device of claim 1 wherein the phase modulation format is selected from BPSK or nPSK.

7. The device of claim 1 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block;

wherein the amplified modulation format is a PAM format.

8. The device of claim 1 wherein the phase/amplitude modulation is QAM.

9. The device of claim 1 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

10. The device of claim 1 wherein the control block is configured to initiate a laser bias or a modulator bias.

11. The device of claim 1 wherein the control block is configured for laser bias and power control of the silicon photonics device.

12. The device of claim 1 wherein the control block is configured with a thermal tuning or carrier tuning device each of which is configured on the silicon photonics device.

13. The device of claim 1 wherein the SerDes block is configured to convert a first data stream of N into a second data stream of M.

14. A monolithically integrated system on chip device, the device comprising:

a single silicon substrate member;

a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the substrate member and coupled to the data input/output interface;

a signal processing block provided on the substrate member and coupled to the input/output block, the signal processing block configured to the input/output block using a bi-direction bus in an intermediary protocol;

a driver module provided on the substrate member and coupled to the signal processing block, the driver module coupled to the signal processing block using a uni-directional multi-lane bus;

a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format;

a receiver module comprising a TIA block provided on the substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;

a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, the driver block, and the receiver block;

a communication interface coupled to the communication block;

a control block provided on the substrate member and coupled to the communication block;

a control interface provided to communicate between the control block and the silicon photonics device, the control interface comprising;

a modulator bias voltage input;

a laser DC bias current input;

a photocurrent or set output;

a power monitor current/voltage output;

a photodetector bias input;

a heater current/voltage input;

a photocurrent from input signal or set output;

a wavelength monitor voltage/current/resistance output.

15. The device of claim 14 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block;

and the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;

wherein the interface is configured on the silicon photonics device.

16. The device of claim 15 wherein the driver module is selected from a current drive or a voltage driver.

17. The device of claim 15 wherein the driver module is a differential driver.

18. The device of claim 15 wherein the amplified modulation format is selected from NRZ format or PAM format.

19. The device of claim 15 wherein the phase modulation format is selected from BPSK or nPSK.

20. The device of claim 15 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block;

wherein the amplified modulation format is a PAM format.

21. The device of claim 15 wherein the phase/amplitude modulation is QAM.

22. The device of claim 15 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

23. The device of claim 15 wherein the control block is configured to initiate a laser bias or a modulator bias.

24. The device of claim 15 wherein the control block is configured for laser bias and power control of the silicon photonics device.

25. The device of claim 15 wherein the control block is configured with a thermal tuning or carrier tuning device each of which is configured on the silicon photonics device.

26. The device of claim 15 wherein the SerDes block is configured to convert a first data stream of N into a second data stream of M.