Inspection guided overlay metrology
First Claim
1. A method for inspection guided metrology, comprising:
- performing a pattern search in order to identify one or more instances of a predetermined pattern on a semiconductor wafer;
generating a care area for each of the one or more instances of the predetermined pattern on the semiconductor wafer;
identifying one or more defects within each of the one or more generated care areas by performing an inspection scan of each of the one or more generated care areas, wherein the inspection scan includes a low-threshold inspection scan or a high sensitivity inspection scan;
identifying one or more metrology sites of at least some of the one or more instances of the predetermined pattern on the semiconductor wafer having a measured metrology parameter deviating from a selected metrology specification utilizing a defect inspection technique;
comparing location data of the one or more identified defects of a generated care area to location data of the one or more identified metrology sites within the generated care area in order to identify one or more locations wherein the one or more defects are proximate to the one or more identified metrology sites; and
generating a metrology sampling plan based on the identified one or more locations wherein the one or more defects are proximate to the one or more identified metrology sites.
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Abstract
Inspection guided overlay metrology may include performing a pattern search in order to identify a predetermined pattern on a semiconductor wafer, generating a care area for all instances of the predetermined pattern on the semiconductor wafer, identifying defects within generated care areas by performing an inspection scan of each of the generated care areas, wherein the inspection scan includes a low-threshold or a high sensitivity inspection scan, identifying overlay sites of the predetermined pattern of the semiconductor wafer having a measured overlay error larger than a selected overlay specification utilizing a defect inspection technique, comparing location data of the identified defects of a generated care area to location data of the identified overlay sites within the generated care area in order to identify one or more locations wherein the defects are proximate to the identified overlay sites, and generating a metrology sampling plan based on the identified locations.
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Citations
24 Claims
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1. A method for inspection guided metrology, comprising:
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performing a pattern search in order to identify one or more instances of a predetermined pattern on a semiconductor wafer; generating a care area for each of the one or more instances of the predetermined pattern on the semiconductor wafer; identifying one or more defects within each of the one or more generated care areas by performing an inspection scan of each of the one or more generated care areas, wherein the inspection scan includes a low-threshold inspection scan or a high sensitivity inspection scan; identifying one or more metrology sites of at least some of the one or more instances of the predetermined pattern on the semiconductor wafer having a measured metrology parameter deviating from a selected metrology specification utilizing a defect inspection technique; comparing location data of the one or more identified defects of a generated care area to location data of the one or more identified metrology sites within the generated care area in order to identify one or more locations wherein the one or more defects are proximate to the one or more identified metrology sites; and generating a metrology sampling plan based on the identified one or more locations wherein the one or more defects are proximate to the one or more identified metrology sites. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A system for inspection guided metrology, comprising:
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an inspection system configured to detect defects on a semiconductor wafer; a metrology system configured to measure a metrology parameter at one or more locations of a selected pattern on a semiconductor wafer; and a computer system configured to; perform a pattern search in order to identify one or more instances of a predetermined pattern on a semiconductor wafer; generate a care area for each of the one or more instances of the predetermined pattern on the semiconductor wafer; identify one or more defects within each of the one or more generated care areas by performing an inspection scan of each of the one or more generated care areas, wherein the inspection scan includes a low-threshold inspection scan or a high sensitivity inspection scan; identify one or more metrology sites of at least some of the one or more instances of the predetermined pattern of the semiconductor wafer having a measured metrology parameter deviating from a selected metrology specification utilizing a defect inspection technique; compare location data of the one or more identified defects of a generated care area to location data of the one or more identified metrology sites within the generated care area in order to identify one or more locations wherein the one or more defects are proximate to the one or more identified metrology sites; and generate a metrology sampling plan based on the identified one or more locations wherein the one or more defects are proximate to the one or more identified metrology sites. - View Dependent Claims (19, 20, 21, 22, 23, 24)
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Specification