Dense arrays and charge storage devices
First Claim
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1. A method of making a monolithic three-dimensional semiconductor memory device, comprising:
- forming a plurality of vertical semiconductor regions and a charge storage medium over a substrate, wherein said vertical semiconductor regions are arranged in two or more horizontal rows, each of said horizontal rows having two or more said vertical semiconductor regions, and wherein the charge storage medium comprises one or more layers located lateral to the plurality of vertical semiconductor regions; and
forming a plurality of control gates lateral to the charge storage medium, wherein the plurality of control gates comprises a first control gate and a second control gate which is located above the first control gate;
wherein each of said first control gate and said second control gate are common among at least two of the plurality of vertical semiconductor regions in one of said horizontal rows and among at least two of the plurality of vertical semiconductor regions in a different one of said horizontal rows; and
wherein the memory device comprises two or more memory elements vertically disposed relative to the substrate and vertically separated from each other.
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Abstract
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is planarized by chemical mechanical polishing.
233 Citations
21 Claims
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1. A method of making a monolithic three-dimensional semiconductor memory device, comprising:
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forming a plurality of vertical semiconductor regions and a charge storage medium over a substrate, wherein said vertical semiconductor regions are arranged in two or more horizontal rows, each of said horizontal rows having two or more said vertical semiconductor regions, and wherein the charge storage medium comprises one or more layers located lateral to the plurality of vertical semiconductor regions; and forming a plurality of control gates lateral to the charge storage medium, wherein the plurality of control gates comprises a first control gate and a second control gate which is located above the first control gate; wherein each of said first control gate and said second control gate are common among at least two of the plurality of vertical semiconductor regions in one of said horizontal rows and among at least two of the plurality of vertical semiconductor regions in a different one of said horizontal rows; and wherein the memory device comprises two or more memory elements vertically disposed relative to the substrate and vertically separated from each other. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of making a monolithic three-dimensional semiconductor memory device, comprising:
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forming a plurality of vertical semiconductor regions over a substrate, wherein said vertical semiconductor regions are arranged in two or more horizontal rows, each of said horizontal rows having two or more said vertical semiconductor regions; forming a charge storage medium over the substrate, wherein the charge storage medium comprises one or more layers located lateral to the plurality of vertical semiconductor regions; and forming a plurality of control gates lateral to the charge storage medium, wherein the plurality of control gates comprises a first control gate and a second control gate which is located above the first control gate; wherein each of said first control gate and said second control gate are common among at least two of the plurality of vertical semiconductor regions in one of said horizontal rows and among at least two of the plurality of vertical semiconductor regions in a different one of said horizontal rows; and wherein the memory device comprises two or more memory elements vertically disposed relative to the substrate and vertically separated from each other. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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Specification