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Edge termination configurations for high voltage semiconductor power devices

  • US 9,171,917 B2
  • Filed: 01/23/2014
  • Issued: 10/27/2015
  • Est. Priority Date: 05/31/2011
  • Status: Active Grant
First Claim
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1. A method to manufacture a semiconductor power device in a semiconductor substrate with an active cell area and an edge termination area comprising:

  • open a wide trench in the edge termination area immediately adjacent to a body region disposed on an outer edge of the active cell area and filling the wide trench with a field-crowding reduction filler followed by etching the field-crowding reduction filler down to a level below a top surface of said wide trench; and

    forming a buried field plate along a sidewall of said wide trench and extending vertically along the body region on the outer edge of the active area and cover a top surface of said field-crowing reduction filler followed by filling the wide trench with the field-crowding reduction filler thus burying the buried field plate in the wide trench below the top surface of the trench.

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