Efficient battery management system

• US 9,172,260 B2
• Filed: 04/30/2013
• Issued: 10/27/2015
• Est. Priority Date: 05/01/2012
• Status: Active Grant

• Current Assignee: XNRGI, Inc.
• Original Assignee: Madhushree Patnaik
• Inventors: Sahu, Saroj Kumar, Patnaik, Madhushree
• Primary Examiner(s): PENG, CHARLIE YU
• Application Number:
  US13/873,878
• Publication Number:
  US 20140320065A1
• Time in Patent Office: 910 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H02J 7/0013 acting upon several batteries simultaneously or sequentially H02J7/1423 takes precedence
• CPC Class Codes: H02J 7/0019 using switched or multiplexed charge circuits
• CPC Class Codes: H02J 7/0029 with safety or protection devices or circuits

Abstract

A battery management system that monitors and controls the charging and discharging of a battery pack in the most versatile way at the block level with little dissipative loss but fast balancing is disclosed. The system has capability of using blocks of cells using different chemistry in the same battery pack. Such versatility makes it very useful for usage with erratic grid conditions, solar, wind and other natural energy sources for charging the battery.

Claims

1. A battery management system (BMS) comprising:

a battery block assembly comprising;

at least two blocks of electrochemical cells;

at least two dual pole single throw (DPST) switches each having a first terminal and a second terminal on a first side and a third terminal and a fourth terminal on a second side;

a plurality of high impedance circuits;

one or more independently isolated power supplies and

a central processor;

wherein

the at least two DPST switches each are paired with a block of the at least two blocks;

each of the first terminals of the at least two DPST switches is connected to a positive polarity of the respectively paired block of the at least two blocks;

each of the second terminals of the at least two DPST switches is connected to a negative polarity of the respectively paired block of the at least two blocks;

the voltages of the at least two blocks each are monitored by a high impedance circuit of the plurality of high impedance circuits in response to a command from the central processor;

the at least two blocks each are connected to an independently isolated power supply of the one or more independently isolated power supplies when the paired DPST switch of the respective block of the at least two blocks is activated;

the at least two blocks each are not connected to the one or more independently isolated power supplies when the paired DPST switch of the respective block of the at least two blocks is not activated; and

no combinations of activations of the at least two DPST switches result in two blocks of the at least two blocks being connected to a selected independently isolated power supply of the one or more independently isolated power supplies.

2. The BMS of claim 1, wherein

periodically the voltages of the at least two blocks are monitored;

in response to an unbalanced state, one or more blocks of the at least two blocks having lower capacities than other blocks are connected to the one or more independently isolated power supplies by activating the at least two DPST switches; and

extra charges are added to the one or more blocks having lower capacities.

3. The BMS of claim 2, wherein the period of switching between the voltages of the blocks of the at least two blocks are measured and the activations of the at least two DPST switches are in effect, is less than 10 times of a total average charge time of the battery block assembly required by an application.

4. The BMS of claim 2, wherein balancing of voltages of the blocks of the at least two blocks takes place during both charging and discharging of the battery block assembly.

5. The BMS of claim 1, wherein during charging, the battery block assembly is electrically disconnected from other electrical devices when:

(a) the voltage of any block of the at least two blocks is greater than a prescribed maximum voltage limit;

(b) a total number of Coulombs counted into the battery block assembly exceeds a prescribed maximum count limit;

or

(c) the current through the battery block assembly exceeds a prescribed maximum current limit.

6. The BMS of claim 1, wherein during discharging, the battery block assembly is electrically disconnected from other electrical devices when:

(a) the voltage of any block of the at least two blocks is smaller than a prescribed minimum voltage limit;

(b) a total number of Coulombs counted out of battery block assembly exceeds a prescribed maximum count limit;

or

(c) the current through the battery block assembly exceeds a prescribed maximum current limit.

7. The BMS of claim 1, wherein the at least two DPST switches each are an electro-mechanical relay with one throw position and two poles.

8. The BMS of claim 1, wherein the at least two DPST switches each are a solid state electrical switch with no moving parts and with one throw position and two poles.

9. The BMS of claim 1, wherein the battery block assembly has at least one block of the at least two blocks that is of different chemistry than the rest of the blocks.

10. The BMS of claim 1, wherein the central processor reads the block voltages and actuates the at least two DPST switches according to a predetermined algorithm.