Induction-coupled clock distribution for an integrated circuit

• US 9,172,383 B2
• Filed: 09/13/2013
• Issued: 10/27/2015
• Est. Priority Date: 01/29/2013
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Chang, David, Hukkoo, Ajat
• Primary Examiner(s): Trinh, Hoa B
• Application Number:
  US14/027,079
• Publication Number:
  US 20140210527A1
• Time in Patent Office: 774 Days
• Field of Search: 257/678, 257/686, 257/777, 257/758, 257/692, 257/676, 257/684, 257/713
• US Class Current: 1/1
• CPC Class Codes: G06F 1/10 Distribution of clock signals , e.g. skew
• CPC Class Codes: H03L 7/06 using a reference signal applied to a frequency- or phase-locked loop

Abstract

An integrated circuit package including an induction-coupled clock distribution system is disclosed. An exemplary embodiment of the disclosure includes a transmission module coupled to a main clock line, a clock reception module coupled to the transmission module, the clock reception module including a clock output line, and an electronic circuit coupled to the clock output line of the clock reception module, the electronic circuit including at least one clocked element and configured to operate synchronously with a clocking signal received through the clock output line of the clock reception module. The transmission module may be disposed on the supporting case of the IC package, and the electronic circuit and the clock reception module may be disposed on the semiconductor die of the IC package.

Claims

1. An integrated circuit package, comprising:

a transmission module, including a transmission coil, coupled to a main clock line;

a semiconductor die;

a clock reception module including a reception coil and a clock output line, the reception coil disposed on the semiconductor die and inductively coupled to the transmission coil of the transmission module to generate a clocking signal on the clock output line;

an electronic circuit disposed on the semiconductor die and coupled to the clock output line of the clock reception module, the electronic circuit comprising at least one clocked element, and configured to operate synchronously with the clocking signal received through the clock output line of the clock reception module; and

a supporting case configured to enclose the semiconductor die, the supporting case comprising the transmission module in a plane parallel and above the semiconductor die.

2. The integrated circuit package of claim 1, wherein the transmission module is disposed within the supporting case.

3. The integrated circuit package of claim 2, wherein the electronic circuit comprises:

a buffer amplifier coupled to the clock output line of the clock reception module and coupled to the at least one clocked element of the electronic circuit.

4. The integrated circuit package of claim 1, wherein the transmission module is disposed on the supporting case.

5. The integrated circuit package of claim 4, wherein the electronic circuit comprises:

a buffer amplifier coupled to the clock output line of the clock reception module and coupled to the at least one clocked element of the electronic circuit.

6. The integrated circuit package of claim 1, further comprising one of a phase lock loop unit and a voltage controlled oscillator coupled to the main clock line.

7. The integrated circuit package of claim 1, the transmission module comprising a transmission coil, and the clock reception module comprising a resonant circuit, wherein

the inductive coupling of the transmission module and the clock reception module comprises an inductive coupling of the transmission coil and the resonant circuit, and

the clock reception module is configured to generate the clocking signal based on a resonance of the resonant circuit.

18. The integrated circuit package of claim 1, wherein the transmission coil includes one or more coil turns, at least one of the one or more coil turns disposed along a perimeter of the supporting case.

19. The integrated circuit package of claim 1, wherein the transmission coil is disposed on an interposer attached to the supporting case.

8. An integrated circuit package comprising:

a semiconductor die;

a supporting case configured to enclose the semiconductor die;

a transmission module coupled to a main clock line and disposed on a plane of the supporting case parallel to the semiconductor die along the perimeter of the supporting case;

a plurality of clock reception modules inductively coupled to the transmission module and disposed on the semiconductor die, each clock reception module comprising a clock output line; and

a plurality of electronic circuits disposed on the semiconductor die, each electronic circuit coupled to the clock output line of a corresponding clock reception module of the plurality of clock reception modules, each electronic circuit comprising at least one clocked element and configured to operate synchronously with a clocking signal received through the corresponding clock output line;

wherein at least one electronic circuit of the plurality of electronic circuits comprises a buffer amplifier coupled to the clock output line of the corresponding clock reception module and coupled to the at least one clocked element of the at least one electronic circuit.

9. The integrated circuit package of claim 8, the plane of the supporting case including the transmission module being disposed within the supporting case, above the semiconductor die.

10. The integrated circuit package of claim 8, the plane of the supporting case including the transmission module being disposed on the supporting case.

11. The integrated circuit package of claim 8, further comprising one of a phase lock loop unit and a voltage controlled oscillator coupled to the main clock line.

12. The integrated circuit package of claim 8, the transmission module comprising a transmission coil, and each clock reception module of the plurality of clock reception modules comprising a reception coil, wherein

the inductive coupling of the transmission module and the plurality of clock reception modules comprises an inductive coupling of the transmission coil and the reception coil of each clock reception module of the plurality of clock reception modules, and

each clock reception module of the plurality of clock reception modules is configured to generate a corresponding clocking signal based on the induction coupling of the transmission coil and the corresponding reception coil.

13. An integrated circuit package, comprising:

a semiconductor die;

a supporting case configured to enclose the semiconductor die;

a plurality of clock reception modules disposed on the semiconductor die, each clock reception module comprising a clock output line;

a plurality of transmission modules coupled to a main clock line, disposed on a plane of the supporting case parallel to the semiconductor die, and each transmission module of the plurality of transmission modules inductively coupled to at least one clock reception module of the plurality of clock reception modules; and

a plurality of electronic circuits disposed on the semiconductor die, each electronic circuit coupled to the clock output line of a corresponding clock reception module of the plurality of clock reception modules, each electronic circuit comprising at least one clocked element and configured to operate synchronously with a clocking signal received through the corresponding clock output line;

wherein one of a phase lock loop unit and a voltage controlled oscillator is coupled to the main clock line.

14. The integrated circuit package of claim 13, at least one electronic circuit further comprising a buffer amplifier coupled to the clock output line of the corresponding clock reception module and coupled to the at least one clocked element of the electronic circuit.

15. The integrated circuit package of claim 13, the plane of the supporting case including the plurality of transmission modules being disposed within the supporting case, above the semiconductor die.

16. The integrated circuit package of claim 13, the plane of the supporting case including the plurality of transmission modules being disposed on the supporting case.

17. The integrated circuit package of claim 13, each transmission module of the plurality of transmission modules comprising a transmission coil, and each clock reception module of the plurality of clock reception modules comprising a reception coil, wherein

the inductive coupling of each transmission module of the plurality of transmission modules and the at least one clock reception module of the plurality of clock reception modules comprises an inductive coupling of the transmission coil of the corresponding transmission module of the plurality of transmission modules and the reception coil of the corresponding at least one clock reception module of the plurality of clock reception modules, and

each clock reception module of the plurality of clock reception modules is configured to generate a corresponding clocking signal based on the corresponding induction coupling.

20. The integrated circuit package of claim 13, wherein each transmission module includes a corresponding transmission coil that generates at least a portion of a magnetic field that induces the clocking signal received through the corresponding clock output line.