Multiple-input and multiple-output carrier aggregation receiver reuse architecture
First Claim
1. A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal, comprising:
- a first multiple-input and multiple-output carrier aggregation receiver reuse architecture that comprises;
a first antenna coupled to a transceiver chip;
a second antenna coupled to the transceiver chip, wherein the second antenna is a wireless local area network antenna; and
the transceiver chip, wherein the transceiver chip comprises a first primary receiver and a first secondary receiver that are configured for both carrier aggregation operation and multiple-input and multiple-output operation; and
a second multiple-input and multiple-output carrier aggregation receiver reuse architecture that comprises;
a third antenna coupled to a receiver chip;
a fourth antenna coupled to the receiver chip, wherein the fourth antenna is a global positioning system antenna; and
the receiver chip, wherein the receiver chip comprises a second primary receiver and a second secondary receiver that are configured for both carrier aggregation operation and multiple-input and multiple-output operation.
1 Assignment
0 Petitions
Accused Products
Abstract
A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal. The wireless communication device includes a first multiple-input and multiple-output carrier aggregation receiver reuse architecture. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a first antenna, a second antenna and a transceiver chip. The first multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a first carrier aggregation receiver path. The wireless communication device also includes a second multiple-input and multiple-output carrier aggregation receiver reuse architecture. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture includes a third antenna, a fourth antenna and a receiver chip. The second multiple-input and multiple-output carrier aggregation receiver reuse architecture reuses a second carrier aggregation receiver path.
300 Citations
31 Claims
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1. A wireless communication device configured for receiving a wireless multiple-input and multiple-output signal, comprising:
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a first multiple-input and multiple-output carrier aggregation receiver reuse architecture that comprises; a first antenna coupled to a transceiver chip; a second antenna coupled to the transceiver chip, wherein the second antenna is a wireless local area network antenna; and the transceiver chip, wherein the transceiver chip comprises a first primary receiver and a first secondary receiver that are configured for both carrier aggregation operation and multiple-input and multiple-output operation; and a second multiple-input and multiple-output carrier aggregation receiver reuse architecture that comprises; a third antenna coupled to a receiver chip; a fourth antenna coupled to the receiver chip, wherein the fourth antenna is a global positioning system antenna; and the receiver chip, wherein the receiver chip comprises a second primary receiver and a second secondary receiver that are configured for both carrier aggregation operation and multiple-input and multiple-output operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for receiving a multiple-input and multiple-output wireless signal, comprising:
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receiving a first multiple-input and multiple-output wireless signal using a first antenna, wherein the first antenna is coupled to a transceiver chip; routing the first multiple-input and multiple-output wireless signal through a first primary receiver on the transceiver chip to obtain a primary receive inphase/quadrature signal; receiving a second multiple-input and multiple-output wireless signal using a second antenna, wherein the second antenna is coupled to the transceiver chip, and wherein the second antenna is a wireless local area network antenna; routing the second multiple-input and multiple-output wireless signal through a first secondary receiver on the transceiver chip to obtain a secondary receive inphase/quadrature signal; receiving a third multiple-input and multiple-output wireless signal using a third antenna, wherein the third antenna is coupled to a receiver chip; routing the third multiple-input and multiple-output wireless signal through a second primary receiver on the receiver chip to obtain a tertiary receive inphase/quadrature signal; receiving a fourth multiple-input and multiple-output wireless signal using a fourth antenna, wherein the fourth antenna is coupled to the receiver chip, and wherein the fourth antenna is a global position system antenna; and routing the fourth multiple-input and multiple-output wireless signal through a second secondary receiver on the receiver chip to obtain a quaternary receive inphase/quadrature signal, wherein the first primary receiver, the second primary receiver, the first secondary receiver and the second secondary receiver are configured for both carrier aggregation operation and multiple-input and multiple-output operation. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. An apparatus for receiving a multiple-input and multiple-output wireless signal, comprising:
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means for receiving a first multiple-input and multiple-output wireless signal using a first antenna, wherein the first antenna is coupled to a transceiver chip; means for routing the first multiple-input and multiple-output wireless signal through a first primary receiver on the transceiver chip to obtain a primary receive inphase/quadrature signal; means for receiving a second multiple-input and multiple-output wireless signal using a second antenna, wherein the second antenna is coupled to the transceiver chip, and wherein the second antenna is a wireless local area network antenna; means for routing the second multiple-input and multiple-output wireless signal through a first secondary receiver on the transceiver chip to obtain a secondary receive inphase/quadrature signal; means for receiving a third multiple-input and multiple-output wireless signal using a third antenna, wherein the third antenna is coupled to a receiver chip; means for routing the third multiple-input and multiple-output wireless signal through a second primary receiver on the receiver chip to obtain a tertiary receive inphase/quadrature signal; means for receiving a fourth multiple-input and multiple-output wireless signal using a fourth antenna, wherein the fourth antenna is coupled to the receiver chip, and wherein the fourth antenna is a global position system antenna; and means for routing the fourth multiple-input and multiple-output wireless signal through a second secondary receiver on the receiver chip to obtain a quaternary receive inphase/quadrature signal, wherein the first primary receiver, the second primary receiver, the first secondary receiver and the second secondary receiver are configured for both carrier aggregation operation and multiple-input and multiple-output operation. - View Dependent Claims (28, 29, 30, 31)
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Specification