Position-sensitive readout modes for digital silicon photomultiplier arrays

• US 9,176,241 B2
• Filed: 07/27/2012
• Issued: 11/03/2015
• Est. Priority Date: 08/03/2011
• Status: Active Grant

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Koninklijke Philips N.V.
• Inventors: Frach, Thomas
• Primary Examiner(s): Hannaher, Constantine
• Application Number:
  US14/234,650
• Publication Number:
  US 20140175294A1
• Time in Patent Office: 1,194 Days
• US Class Current: 1/1
• CPC Class Codes: G01T 1/20184 Detector read-out circuitry, e.g. for clearing of traps, compensating for traps or compensating for direct hits
• CPC Class Codes: G01T 1/248 Silicon photomultipliers [SiPM], e.g. an avalanche photodiode [APD] array on a common Si substrate
• CPC Class Codes: G01T 1/249 specially adapted for use in SPECT or PET SPECT imaging G01T1/1642; PET imaging G01T1/2985; detecting prohibited goods, e.g. weapons, explosives, hazardous substances, contraband or smuggled objects G01V5/20
• CPC Class Codes: G01T 1/2985 In depth localisation, e.g. using positron emitters; Tomographic imaging (longitudinal and transverse section imaging; apparatus for radiation diagnosis sequentially in different planes, steroscopic radiation diagnosis); using external radiation sources A61B6/02
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/707 Pixels for event detection

Abstract

A photon detector (10) includes a detector array (12) comprising single photon avalanche diode (SPAD) detectors (14) configured to break down responsive to impingement of a photon. Trigger circuitry (34) is configured to generate a trigger signal responsive to break down of a SPAD detector of the detector array. Latches (20, 22) are configured to store position coordinates of SPAD detectors of the detector array that are in break down. The latches are configured to latch responsive to a trigger signal generated by the trigger circuitry. The latches may include row latches (22) each connecting with a logical “OR” combination of SPAD detectors of a corresponding row of the detector array, and column latches (20) each connecting with a logical “OR” combination of SPAD detectors of a corresponding column of the detector array. Time to digital converter (TDC) circuitry (28) may generate a digital time stamp for the trigger signal.

Claims

1. An apparatus comprising:

a photon detector including;

a detector array comprising single photon avalanche diode (SPAD) detectors configured to break down responsive to impingement of a photon,

trigger circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the detector array, and

latches configured to store position coordinates of SPAD detectors of the detector array that are in break down, the latches being configured to latch responsive to a trigger signal generated by the trigger circuitry;

wherein the latches comprise;

row latches wherein each row latch connects with a logical “

OR”

combination of SPAD detectors of a corresponding row of the detector array; and

column latches wherein each column latch connects with a logical “

OR”

combination of SPAD detectors of a corresponding column of the detector array.

2. The apparatus of claim 1, further comprising:

at least one delay element that delays propagation of the trigger signal to the latches by a delay time that is effective to ensure that the latches upon latching store the position coordinates of the SPAD detector whose break down caused the trigger circuitry to generate the trigger signal.

3. The apparatus of claim 1, wherein the photon detector including the detector array, the trigger circuitry, and the latches is disposed monolithically on a silicon substrate.

4. The apparatus of claim 1, wherein the photon detector further includes:

time to digital converter (TDC) circuitry configured to generate a digital time stamp for a trigger signal generated by the trigger circuitry.

5. The apparatus of claim 4, wherein the photon detector further includes:

processing and output circuitry that generate and output (1) a photon detection position comprising position coordinates of a SPAD detector that is in break down based on values stored in the latches after latching responsive to a trigger signal generated by the trigger circuitry and (2) a digital time stamp generated by the TDC circuitry for the trigger signal caused the latching of the latches.

6. The apparatus of claim 5, wherein the processing and output circuitry are further configured to output an error signal responsive to the latches after latching indicating two or more SPAD detectors being in break down.

7. The apparatus of claim 1, further comprising:

a positron emission tomography (PET) scanner including a plurality of said photon detectors arranged as a detector ring encircling a region of interest.

8. An apparatus comprising:

a photon detector including;

a detector array comprising single photon avalanche diode (SPAD) detectors configured to break down responsive to impingement of a photon;

trigger circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the detector array;

latches configured to store position coordinates of SPAD detectors of the detector array that are in break down, the latches being configured to latch responsive to a trigger signal generated by the trigger circuitry; and

at least one delay element that delays propagation of the trigger signal to the latches by an integration time interval such that the latches after latching provide a position coordinates for the SPAD detectors that break down over the integration time interval.

9. A method comprising:

providing a detector array comprising single photon avalanche diode (SPAD) detectors configured to break down responsive to impingement of a photon in a position;

providing latches configured to store position coordinates of a SPAD detector of the detector array that is in break down;

generating a trigger signal responsive to break down of a SPAD detector of the detector array;

latching the latches responsive to the trigger signal; and

performing time to digital conversion triggered by the trigger signal to generate a time stamp for the breakdown of the SPAD detector whose break down caused the generating of the trigger signal.

10. The method of claim 9, further comprising:

delaying propagation of the trigger signal to the latches by a delay interval effective to ensure that the latches store position coordinates of the SPAD detector whose breakdown caused the generating of the trigger signal prior to the latching.

11. The method of claim 9, further comprising:

after the latching, reading the latches to determine a position of the SPAD detector whose breakdown caused the generating of the trigger signal.

12. The method of claim 9, further comprising:

delaying propagation of the trigger signal to the latches by an integration time; and

after the latching, reading the latches to generate an image of the SPAD detectors of the detector array that broke down over the integration interval.

13. An apparatus comprising:

a photon detector including;

an array of single photon avalanche diode (SPAD) detectors,

latches configured to store position coordinates of a SPAD detector of the array that is in breakdown,

triggering circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the array wherein the trigger signal causes latching of the latches,

processing circuitry configured to output a photon detection position based on position coordinates stored in the latched latches; and

time to digital converter (TDC) circuitry configured to generate a digital time stamp for a trigger signal generated by the trigger circuitry.

14. The apparatus of claim 13, wherein

the processing circuitry is further configured to output a photon detection time based on the digital time stamp for the trigger signal causing the latching of the latches.

15. The apparatus of claim 13, wherein the photon detector further comprises:

at least one delay element arranged to delay the latching of the latches by a delay time effective to ensure that the latched latches store the position coordinates of the SPAD detector whose break down caused the trigger circuitry to generate the trigger signal.

16. An apparatus comprising:

a photon detector including;

an array of single photon avalanche diode (SPAD) detectors,

latches configured to store position coordinates of SPAD detectors of the array that are in breakdown,

triggering circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the array wherein the trigger signal causes latching of the latches,

at least one delay element that delays the latching by an integration time, and

processing circuitry configured to output detection positions of photons detected over the integration time based on position coordinates stored in the latched latches.

17. The apparatus of claim 16, further comprising:

a scintillator viewed by the photon detector to detect scintillation photons emitted by the scintillator responsive to a radiation particle being absorbed by the scintillator;

wherein the processing circuitry is configured to compute a location of the radiation particle detection as a center of the output detection positions of photons detected by the photon detector over the integration time.

18. The apparatus of claim 17, further comprising:

a radiological imaging system comprising said scintillator and said photon detector configured as one of (1) a radiation detector ring encircling a region of interest and (2) a radiation detector head mounted on a robotic arm or gantry configured to orbit the radiation detector head around a region of interest.