Semiconductor device and method for manufacturing the same

• US 9,177,855 B2
• Filed: 08/25/2014
• Issued: 11/03/2015
• Est. Priority Date: 10/09/2009
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun, Takahashi, Masahiro, Kishida, Hideyuki, Miyanaga, Akiharu, Sugao, Junpei, Uochi, Hideki, Nakamura, Yasuo
• Primary Examiner(s): CHAUDHARI, CHANDRA P
• Application Number:
  US14/467,142
• Publication Number:
  US 20140370706A1
• Time in Patent Office: 435 Days
• Field of Search: 438/663
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating layer comprising silicon nitride over a substrate;

forming a first conductive layer comprising copper over the first insulating layer;

forming a second conductive layer so as to cover the first conductive layer;

forming a second insulating layer comprising silicon nitride over the second conductive layer;

forming a third insulating layer comprising silicon oxide over the second insulating layer;

forming an oxide semiconductor layer over the third insulating layer;

performing a first heat treatment so that hydrogen concentration of the oxide semiconductor layer is decreased;

forming a third conductive layer and a fourth conductive layer over the oxide semiconductor layer;

forming a fourth insulating layer comprising silicon oxide over the oxide semiconductor layer;

forming a fifth insulating layer comprising silicon nitride over the fourth insulating layer;

forming a fifth conductive layer over the fifth insulating layer so as to be electrically connected to one of the third conductive layer and the fourth conductive layer;

forming a sixth conductive layer comprising copper over the fifth conductive layer;

forming a sixth insulating layer comprising silicon nitride so as to cover the sixth conductive layer; and

forming a seventh conductive layer over the sixth insulating layer so as to be electrically connected to the other of the third conductive layer and the fourth conductive layer,

wherein the first conductive layer and the sixth conductive layer do not overlap with the oxide semiconductor layer, and

wherein the third conductive layer and the fourth conductive layer each comprise same material.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment is performed by a rapid thermal anneal method.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment is performed at higher than or equal to 400°

C. and lower than or equal to 750°

C.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment is performed in a rare gas or nitrogen atmosphere.

5. The method for manufacturing a semiconductor device according to claim 1, further comprising the step of performing a second heat treatment at a temperature lower than that of the first heat treatment after the fourth insulating layer is formed.

6. The method for manufacturing a semiconductor device according to claim 5, wherein the second heat treatment is performed at higher than or equal to 200°

C. and lower than or equal to 400°

C.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the first conductive layer further comprises at least one element selected from the group consisting of tungsten, tantalum, molybdenum, titanium, chromium, aluminum, zirconium, and calcium.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the second conductive layer comprises an element having a higher melting point than copper.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises at least one of indium, gallium, and zinc.

10. The method for manufacturing a semiconductor device according to claim 1, wherein the sixth conductive layer further comprises at least one element selected from the group consisting of tungsten, tantalum, molybdenum, titanium, chromium, aluminum, zirconium, and calcium.

11. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first insulating layer comprising silicon nitride over a substrate;

forming a first conductive layer comprising copper over the first insulating layer;

forming a second conductive layer over the first conductive layer so as to cover the first conductive layer;

forming a second insulating layer comprising silicon nitride over the second conductive layer;

forming a third insulating layer comprising silicon oxide over the second insulating layer;

forming an island-like oxide semiconductor layer over the third insulating layer;

forming third conductive layers functioning as a source electrode and a drain electrode over the island-like oxide semiconductor layer;

forming a fourth insulating layer comprising silicon oxide over the third conductive layers;

forming a fifth insulating layer comprising silicon nitride over the fourth insulating layer;

forming a fourth conductive layer so as to be electrically connected to one of the third conductive layers functioning as the source electrode and the drain electrode through an opening provided in the fourth insulating layer and the fifth insulating layer;

forming a fifth conductive layer comprising copper over the fourth conductive layer;

forming a sixth insulating layer comprising silicon nitride so as to cover the fifth conductive layer; and

forming a sixth conductive layer so as to be electrically connected to the other of the third conductive layers functioning as the source electrode and the drain electrode through an opening provided in the fourth insulating layer, the fifth insulating layer, and the sixth insulating layer,

wherein a first heat treatment is performed so that hydrogen concentration of the island-like oxide semiconductor layer is decreased, and

wherein the first conductive layer and the fifth conductive layer do not overlap with the island-like oxide semiconductor layer.

12. The method for manufacturing a semiconductor device according to claim 11, wherein the first heat treatment is performed by a rapid thermal anneal method.

13. The method for manufacturing a semiconductor device according to claim 11, wherein the first heat treatment is performed at higher than or equal to 400°

C. and lower than or equal to 750°

C.

14. The method for manufacturing a semiconductor device according to claim 11, wherein the first heat treatment is performed in a rare gas or nitrogen atmosphere.

15. The method for manufacturing a semiconductor device according to claim 11, further comprising the step of performing a second heat treatment at a temperature lower than that of the first heat treatment after the fourth insulating layer is formed.

16. The method for manufacturing a semiconductor device according to claim 15, wherein the second heat treatment is performed at higher than or equal to 200°

C. and lower than or equal to 400°

C.

17. The method for manufacturing a semiconductor device according to claim 11, wherein the first conductive layer further comprises at least one element selected from the group consisting of tungsten, tantalum, molybdenum, titanium, chromium, aluminum, zirconium, and calcium.

18. The method for manufacturing a semiconductor device according to claim 11, wherein the second conductive layer comprises an element having a higher melting point than copper.

19. The method for manufacturing a semiconductor device according to claim 11, wherein the island-like oxide semiconductor layer comprises at least one of indium, gallium, and zinc.

20. The method for manufacturing a semiconductor device according to claim 11, wherein the fifth conductive layer further comprises at least one element selected from the group consisting of tungsten, tantalum, molybdenum, titanium, chromium, aluminum, zirconium, and calcium.

21. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first conductive layer comprising copper over a substrate;

forming a first insulating layer comprising nitrogen over the first conductive layer;

forming a second insulating layer comprising oxygen over the first insulating layer;

forming an oxide semiconductor layer over the second insulating layer;

forming a second conductive layer over the oxide semiconductor layer, wherein the second conductive layer comprises one selected from the group consisting of W, Ta, Mo, Ti and Cr;

forming a third conductive layer comprising copper over the second conductive layer, wherein the third conductive layer is electrically connected to the oxide semiconductor layer; and

forming a fourth conductive layer electrically connected to the oxide semiconductor layer, wherein the fourth conductive layer comprises a transparent conductive material.

22. The method for manufacturing a semiconductor device according to claim 21, further comprising the step of performing a heat treatment so that hydrogen concentration of the oxide semiconductor layer is decreased.

23. The method for manufacturing a semiconductor device according to claim 21, wherein the first conductive layer further comprises at least one element selected from the group consisting of tungsten, tantalum, molybdenum, titanium, chromium, aluminum, zirconium, and calcium.

24. The method for manufacturing a semiconductor device according to claim 21, wherein the oxide semiconductor layer comprises at least one of indium, gallium, and zinc.

25. The method for manufacturing a semiconductor device according to claim 21, wherein the third conductive layer further comprises at least one element selected from the group consisting of tungsten, tantalum, molybdenum, titanium, chromium, aluminum, zirconium, and calcium.