Light emitting device having light extraction structure

• US 9,178,112 B2
• Filed: 08/02/2011
• Issued: 11/03/2015
• Est. Priority Date: 10/29/2007
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation), LG Innotek Company Limited (LG Corporation)
• Inventors: Kim, Sun Kyung
• Primary Examiner(s): Montalvo, Eva Y
• Assistant Examiner(s): Vieira, Diana C
• Application Number:
  US13/196,648
• Publication Number:
  US 20110287564A1
• Time in Patent Office: 1,554 Days
• Field of Search: 438/26, 438/27, 438/29, 438/32, 257/E33.06, 257/E21.023
• US Class Current: 1/1
• CPC Class Codes: H01L 2933/0083 Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/50 Wavelength conversion elements
• CPC Class Codes: H01L 33/505 characterised by the shape, e.g. plate or foil
• CPC Class Codes: H01L 33/58 Optical field-shaping elements

Abstract

A light emitting device having a light extraction structure, which is capable of achieving an enhancement in light extraction efficiency and reliability, and a method for manufacturing the same. The light emitting device includes a semiconductor layer having a multi-layered structure including a light emission layer; and a light extraction structure formed on the semiconductor layer in a pattern having unit structures. Further, the wall of each of the unit structures is sloped at an angle of −45° to +45° from a virtual vertical line being parallel to a main light emitting direction of the light emitting device.

Claims

1. A method for manufacturing a light emitting device, the method comprising:

applying a mask layer on a dielectric layer on a semiconductor layer;

forming a pattern into the mask layer, the pattern comprising unit structures,

wherein the unit structures have a hole or a rod shape, and

wherein a wall of the unit structures is sloped at an angle of −

45°

to +45°

, from a virtual vertical line parallel to a light emitting direction of the light emitting device;

forming a light extraction structure into the dielectric layer using the mask layer; and

controlling an average filling factor of the pattern by adjusting at least one of a slope of the wall, a radius of the unit structures, and a lattice structure of the light extraction structure,

wherein the average filling factor of the light extraction structure is more than 5% and less than 37% with respect to an area of a light emission surface of the light emitting device, and

wherein the average filling factor is a ratio of an average area of the pattern with respect to a total area of a light emission surface of the light emitting device.

2. The method according to claim 1, wherein the semiconductor layer comprises GaN.

3. The method according to claim 1, wherein the step of forming the pattern comprises:

forming the pattern using photolithography.

4. The method according to claim 3, wherein a distance between centers of neighboring unit structures of the pattern is 1˜

10 times a wavelength of irradiated light.

5. The method according to claim 1, wherein a period of the light extraction structure or an average distance between centers of neighboring unit structures is 400˜

3,000 nm.

6. The method according to claim 1, wherein a period of the light extraction structure or an average distance between centers of neighboring unit structures is more than 3,000 nm.

7. The method according to claim 1, wherein a height of the unit structures is λ

/2n˜

3,000 nm, “

n”

representing a refraction index of a material of the light extraction structure, and λ

representing a central wavelength of the light emitting device.

8. The method according to claim 1, wherein the unit structures has a truncated shape.

9. The method according to claim 1, wherein the light extraction structure comprises one of a rectangular lattice structure, a triangular lattice structure, an Archimedean lattice structure, a random structure, a Quasi-crystal structure, and a Quasi-random structure.

10. The method according to claim 1, wherein a slope of the wall of the unit structures is configured to enhance a light extraction efficiency of the light emitting device.

11. The method according to claim 1, wherein a light emission surface of the light emitting device is formed as a horizontally sectional virtual surface below the light extraction structure.

12. The method according to claim 1, wherein the mask layer comprises a photoresist.

13. The method according to claim 1, wherein the dielectric layer contacts the semiconductor layer.

14. A method for manufacturing a light emitting device, the method comprising:

applying a mask layer on a light extraction layer;

forming a pattern into the mask layer, the pattern comprising unit structures,

wherein the unit structures have a hole or a rod shape, and

wherein a wall of the unit structures is sloped at an angle of −

45°

to +45°

from a virtual vertical line parallel to a light emitting direction of the light emitting device; and

forming a light extraction structure into the light extraction layer using the mask layer,

wherein an average filling factor of the light extraction structure is more than 5% and less than 37% with respect to an area of a light emission surface of the light emitting device, and

wherein the average filling factor is a ratio of an average area of the pattern with respect to a total area of a light emission surface of the light emitting device.